Re: Second Stage of Op-Am (Current to Voltage)

From: Monty Hall (chickenkungpao_at_hotmail.com)
Date: 12/28/04 

Date: Tue, 28 Dec 2004 16:54:18 GMT

Larry thanks for the response!!!! It's exactly what I was looking for! The
discussion in another subthread w/ Active8 threw me for a loop - as he
didn't believe a negative Iout could exist. Finally, I can ask my real
question...

If the cap is a current integrator that does the transduction to voltage,
wouldn't the output ramp wrt time until saturated in an open loop
configuration & (V+ - V-) < 0? Of course, integration would stop when (V+ -
V-) == 0 because Iout ==0. The (V+ - V-) < 0 can be substitued w/ > 0 ,
just want Iout to be consistently non zero & + or - wrt time.

It seems very contrary to some web pages & text that say that the op-amp can
be operated open loop and the output is as simple as Vout = A(V+ - V-). If
current integration is true - any (V+ - V-) < 0 would cause saturation -
eventually - due to Iout != 0 - right? If this is not the case and the
op-amp output voltage settles to a value in an open loop & (V+ - V-) < 0
configuration, why does the settling happen despite Iout != 0?

Larry, sorry if my terminology in my prev post is unclear - I'm a newbie to
EE :) All others, the schematic of op-amp stage 1 & 2 @ bottom of page.

Regards,

Monty

"Larry Brasfield" <donotspam_larry_brasfield@hotmail.com> wrote in message
news:FYcAd.1$UN4.698@news.uswest.net...
> "Monty Hall" <chickenkungpao@hotmail.com> wrote in message
> news:_mbAd.3725$li1.1840@newssvr31.news.prodigy.com...
>> From the schematic below, can Iout be bidirectional?
>
> Yes. Iout is the difference between Ic2 (designated as leaving Q2-C)
> and Ic1 (designated as entering Q4-C). Since both are positive and
> about matched, their difference can take either sign.
>
>> Included is the schematic of Fredericken's(Intuitive IC Op Amps) basic
>> op-amp sans stage 3 - emitter follower unity gain output. How is Iout
>> converted to voltage?
>
> You can think of Cc and that (nameless) rightmost transistor
> as an integrator (if Early voltage is infinite) or as a high-gain
> stage with a very low frequency pole (otherwise).
>
>> In Frederickson's text:
>> "The second stage of the basic op-amp converts this current back into
>> a voltage Vout, that will become the output voltage of the op amp. An
>> internal capacitor, Cc, is the component that does this conversion of
>> current to voltage."
>
> That seems to eliminate the role of that nameless transistor.
> Since it functions to hold its base at nearly constant voltage,
> by driving the top end of Cc, that is quite an omission.
>
>> It would seem that this statement has answered my question. How is Vo
>> calculated and how can Iout be negative? Active8, I'm speaking wrt
>> Frederickson's text & schematic below. He clearly states Iout can be
>> bi-directional.
>>
>> First I want to make sure about the bi-directionality of Iout - it seems
>> there is disagreement here from other posts.
>
> Anybody who disagrees with the bi-directionality is mistaken.
>
>> How would you characterize stage 1's output @ Vo'. Is it:
>> 1.) a current pump w/ Iout(V+ - V-) = Ic2 - Ic1 & 2Ic < Iout < 2Ic
>
> Ok. We usually call that a current source.
>
>> 2) a high impedance voltage source Vo' = Av(V+ - V-)
>> 3) something else
>>
>> If it is 2, I would appreciate it if you can answer the following:
>>
>> 1. How do you compute Vo'?
>
> In the simplest model of that circuit, you need not compute it
> at all. Qnameless holds it constant by virtue of it low input
> impedance relative to the output impedance of Q2-Q4.
>
>> IOW, how is the transfer function of Vo'/(V+ - V-) & Vo/(V+ - V-)
>> derived? Basically not sure how calculate collector voltage that has an
>> active load. I've always assumed that the delta in collector currents
>> from Q2 and Q4 make a current pump @ that point.
>
> Then stop worrying about the voltage transfer function.
> Write the transconductance transfer function. With very
> little error (easily accommodated as a 2nd order effect),
> you can use simple device transconductance to derive it.
>
>> 2. Why is the discussion about Iout = Ic2 - Ic1 relevant if 2 is true?
>
> Not going there.
>
>> Ga Tech/Penn State/MTU/UNLV/... lectures always have DC analysis of the
>> differential amplifier active load end w/ Iout(V+ - V-) = Ic2 - Ic1 and
>> stop short of stage 2 conversion of current to voltage. However,
>> Frederickson's "Intuitive IC op-amps" mentions the cap is where the
>> conversion takes place. Other - specifically Active8 - may choose "3)
>> something else" because he believes that Iout can't be negative.
>
> If he truly believes or stated that, throw out his book. It will
> do more harm than good with respect to your understanding.
> Are you sure you are not mischaracterizing him?
>
>> Regards,
>>
>> Monty
>>
>> +Vcc +Vcc
>> o o
>> | |
>> | |
>> 2 Ic = Bias Current Io = Bias Current
>> | |
>> | |
>> | |
>> o------o-----o |
>> | | |
>> |< >| o-------o----o Vo
>> Vin(-) -| Q1 Q2 |- Vin(+) | |
>> |\ /| Cc --- o
>> |Ic1 Ic2 | --- |
>> | | Vo' | |/
>> | o----------------------o---o-|
>> | | Iout = Ic2 - Ic1 (+/- 2 Ic)|>
>> | | o
>> | | |
>> | | Ic1 |
>> | o |
>> | |/ |
>> o----o---o-| Q4 |
>> | | |> |
>> | | Ic1 o |
>> | o | |
>> | |/ | |
>> |--| Q3 | |
>> |> | |
>> | | |
>> -------o |
>> | |
>> | |
>> -Vee -Vee
>> (created by AACircuit v1.28.4 beta 13/12/04 www.tech-chat.de)
>
> --
> --Larry Brasfield
> email: donotspam_larry_brasfield@hotmail.com
> Above views may belong only to me.
>

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