Re: coutdown 555 timer values?

On Sun, 24 Jul 2005 13:39:29 -0400, John Popelish <jpopelish@xxxxxxxx>
wrote:

>John Fields wrote:
>> On 22 Jul 2005 14:01:01 -0700, "aman" <aman.bindra@xxxxxxxxx> wrote:
>>
>>
>>>You might want to consider a simple 8 bit microcontroller like PIC. All
>>>micro-controllers have timer interrupts. If not using a CD4017 as a
>>>counter and using 555 to generate a 30 sec pulse seems like a good idea.
>>
>>
>> ---
>> It may seem like it is, but in reality it isn't.
>
>He would have to add some logic, like some SR flip flops and a bit
>more. I just get worried about the stability of more than a minute
>versions of 555s.
>
>> Note that the OP wanted six timeout periods all starting at once, but
>> as they timed out, each one lasting 30 seconds longer than the one
>> which timed out before it. Like this:
>>
>> ___
>> T1___| |__________________________________________
>>
>> ______
>> T2___| |_______________________________________
>>
>> _________
>> T3___| |____________________________________
>>
>> ____________
>> T4___| |_________________________________
>>
>> _______________
>> T5___| |______________________________
>>
>> __________________
>> T6___| |___________________________
>>
>>
>> You can't do that with a 4017.
>
>I'll bet you could come up with something neat based on the 4015 shift
>register.

---
:-)

The tricky part is shortening up that first 555 pulse in astable mode
(which is longer than the rest because of the need to get the timing
cap up to 2/3Vcc from 0V (instead of 1/3Vcc) on startup) and getting
all the shift register outputs to go high on startup.

Using something like three HC74's would solve the "start high" problem
by using the Qbars as outputs, using their SET inputs for POR, and
using their RESET inputs to start the timing sequence. Getting rid of
the extended first pulse problem could be done by using a couple of
555 as monostables in a ring counter.

Schematic on abse as "555 countdown timer (from seb), or:

news:poece11tgcals43avpikokbd73ubinh5kj@xxxxxxx


Then, of course, there's always:

VCC>------+----+
| | V+
| [RT] |
| | [10K]
[R7] +----|-\ |
| | | >--+-->180s
+----|----|+/
| | V+
| | |
[R6] | [10K]
| +----|-\ |
| | | >--+-->150s
+----|----|+/
| | V+
| | |
[R5] | [10K]
| +----|-\ |
| | | >--+-->120s
+----|----|+/
| | V+
| | |
[R4] | [10K]
| +----|-\ |
| | | >--+-->90s
+----|----|+/
| | V+
| | |
[R3] | [10K]
| +----|-\ |
| | | >--+-->60s
+----|----|+/
| | V+
| | |
[R2] | [10K]
| +----|-\ |
| | | >--+-->30s
+----|----|+/
| |
| +----D
[R1] | G--+
| [CT] S |
| | | |
GND>------+----+----+ |
_ |
R/T>---------------------+

In this circuit we use six comparators with references derived
ratiometrically from Vcc, which will make the circuit insensitive to
longish-term variations in Vcc. The circuit works by applying a short
positive pulse to the gate of the MOSFET, which discharges CT and
forces all of the inverting (-) inputs to the comparators lower than
the reference voltages on their non-inverting (+) inputs. This will
cause all of the outputs to go high. Then, when CT charges it will
rise through each of the reference voltages on the + inputs
sequentially, turning each of the comparators ON sequentially,
forcing, and holding, their outputs low, one at a time.

In order to determine the widths of the various outputs we can use

Vcc
T = RC ln ----------- = kRC
Vcc - Vth

to determine what the voltages will be on the - inputs of the
comparators at the times we're interested in.


--
John Fields
Professional Circuit Designer
.

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