Re: Help to copy PAL16 / GAL16 / GAL20 ICs

In article <gutbf15t12il668k28groo47imvvh2lup2@xxxxxxx>,
Rich Webb <bbew.ar@xxxxxxxxxxxxxxxxxx> wrote:
>On Sat, 6 Aug 2005 23:20:22 -0400, "Henry" <apl2research@xxxxxxxxxxx>
>wrote:
>>"David L. Jones" <altzone@xxxxxxxxx> wrote in message
>>news:1123308884.580173.111090@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
>[snip...snip...]
>>>> I did a parallel port based digital IC analyzer many moons ago that
>>>> could automatically detect and decode any digital logic chip, and I can
>>>> tell you that the software is a fair amount of work.
>>
>>May I ask if you still have some schematics or software that I can review?
>>Maybe a Website with kits? It help the thought process and give me a few
>>good ideas.
>
>[Attributions and top-posting corrected]
>
>Nowadays it would probably be easier to use a dedicated microcontroller
>to cycle through the permutations, especially if it's a one-off project,
>or, perhaps, a microcontroller driving a small CPLD.
>
>There are also gadgets that combine logic analyzers with pin drivers,
>like these guys http://www.linkinstruments.com/logana5.htm, where you
>can dedicate some channels as outputs and use the balance for inputs.
>
>However, as David notes, the general solution to the problem is
>reasonably complex. The PLD probably includes a state machine, where the
>condition of the outputs depends on the prior history of the inputs. You
>can't expect just to wiggle the inputs and then record the outputs. In
>the most general case, you'd need to stimulate it with all possible
>sequences of inputs.
>
>You're helped (greatly!) on the smaller PLDs since all of the registers
>are connected to dedicated I/O pins, their state is available whenever
>*OE is asserted, and *OE itself is fixed to one pin. Buried registers or
>tricks played with *OE would make the job much harder.

One shortcut is that if the PALs are the right version, there's a
testing algorithm to preset the registers, so that you have
full visibility.

>Truly, your best bet is to hook up a logic analyzer to an operating
>circuit and run it through its paces. Once you've seen what it does,
>write your own functional equivalent.

There was an outfit that spammed the newsgroup here, over dozen
years ago, for their PLD reverse engineering board/software. It was
not worth the $400 to me to find out if it worked. (Some garage in
Atlanta, as I remember). Try an advanced search on Google newsgroups
in sci.electronics circa 1990.

But the first thing would be to get an old programmer that has the
algorithm to read out the fuse map that particular version of PAL.
If the application was trivial, some outfits didn't bother to blow
the security fuse. (You couldn't return the chips to the manufacturer
if you had a problem with them if you did).

Mark Zenier mzenier@xxxxxxxxxx
Googleproofaddress(account:mzenier provider:eskimo domain:com)

.

Relevant Pages

  • Re: BBC Micro - Microware disc interface?
    ... the 20 pin ones both being octal flip flops, and the 40 pin one being a ... registers are arranged in the BBC's memory mapped I/O area? ... chips might be a PAL of some kind, but that'd mean a late 80s date. ... would need two octal buffers, unless A is for buffering miscellaneous ...
    (comp.sys.acorn.hardware)
  • Re: reasonable timing analysis without mapping design to IO
    ... The modules have a higher pin count as the FPGA itself. ... directives on the I/O registers to make sure they don't get pruned. ... serial/parallel shift register, ...
    (comp.arch.fpga)
  • Re: GPIO support for HTC Dream
    ... My specific question was about the gpio hardware registers. ... Writing a '1' to a bit in the register makes the associated pin a high-level ... Reading the port at this point will return the actual 'input' level of the pin. ... MSM chip or from an external CPLD? ...
    (Linux-Kernel)
  • RE: GPIO support for HTC Dream
    ... On Monday, December 14, 2009 10:55 AM, Daniel Walker wrote: ... My specific question was about the gpio hardware registers. ... Writing a '0' makes the pin a low-level output or an input pin. ... Reading the port at this point will return the actual 'input' level of the pin. ...
    (Linux-Kernel)
  • Re: Opcode Space Found for All Instructions
    ... registers, I much prefer a cache to perform these functions. ... believe you really need a capability like this, then dedicate a cache ...
    (comp.arch)