Re: device for converting binary strings into states for switches


laura wrote:
Hi Chris,

Your idea is good.

The point is that I'm a computer scientist which does not know too many
about circuits.

Could you please explain me again how this device can handle more
switches? How it scales up? For 8 switches I think that I got the idea,
but I didn't understand how do you link them to obtain a bigger
solution.

I also have a question: what means Serial-In-Parallel-Out ?
Why it's serial at input? Should not be parallel too?
I mean I have that binary string generated somehow (it can be generated
into a register). I dont want to send it bit by bit to that shift
register. All operations must be performed in parallel for all bits.

Thanks,
Laura


Chris wrote:
laura wrote:
Hi,

I need to buid a device connected to a computer. The computer will
generate binary strings (each position will be either 0 or 1) of length
N. Based on this string my device has to set the state (on/off) of N
switches.

Example:

The computer generates the string 00110.
I also have 5 switches which must be set by my device as follows: first
2 switches and the last switch must be turned OFF and the 3rd and the
4th must be turned ON.

I have a hard constrain for this problem: the operation described above
must be performed in O(1) steps. This means that it should be
INDEPENDENT of the value of N. All switches must be set in the same
moment.

I DONT want to check the value of each position and to set the state of
the corresponding switch accordingly. This will means O(N) steps and I
want only O(1) steps.

How can I make such device? I should use some properties of the
computer ports, but I dont know how.

Even some small values for N (16 or 32) are of interest for me.

Thanks.
Laura

Hi, Laura. Your description of your homework problem is kind of
careless. If you want a good answer, you have to take care to describe
your question precisely.

I'm going to make some assumptions based on your vague description.
Your class assignment says you have a state machine which can set one
and only one output at a time. However, your problem is that you want
all of the outputs to be asserted simulataneously.

Given this brief but succinct description, it's possible to give a
solution. If that's what you want, you need a serial-to-parallel shift
register with data latch output.

These ICs are actually fairly common. For instance, the 74HC595
performs just this function. It costs less than $1 USD in single
quantities, can give you 8 output bits per IC, and you can daisy chain
many of these ICs together to make one shift register of almost any
reasonable length.

(Note: there are rise- and fall-time considerations for the shift
register clock and the latch clock. The capacitance of these inputs
would realistically limit you to somewhere around 12 ICs in the chain
or 96 discrete outputs, unless you locally buffer the clock signals.)

To use the HC595 as a basic SIPO (Serial-In-Parallel-Out) shift
register, you need your state machine data output, as well as
independent signals for the shift clock and latch clock. You may also
want to use the reset signal and the output enable signal, if you want
to reset the outputs on power up and you need to tri-state the outputs.

The data sheet makes this pretty clear if you have any background in
electronics:

http://www.onsemi.com/pub/Collateral/MC74HC595A-D.PDF

If you're not aware of what a shift register or data latch is, please
go back a few chapters and refresh.

Good luck
Chris

Hi, Laura. First, please bottom post. On Google, click "show
options", then "reply". Put your response to the post below the
previous post -- that gives greater continuity, and makes it easier to
answer the previous post with minimum scolling. Also, it helps for
continuity -- most newsreaders don't act like Google Groups.

You'll need data latches to have all the digital outputs asserted
simultaneously, of course. Two sets of latchess, actually -- one for
latching in from the data bus, and another to latch from the
intermediate latches to the output. But there's a basic problem I'm
not too sure about. If you're transferring data from the state machine
to the output data latches, you will be limited by the size of your
data bus. For instance, if you've got an IBM PC with a 16-bit wide
data bus, you will be limited to sending out 16 bits at a time. That
means you'll need N clock cycles per every 16 bits. If you want it to
be the same for 32, 48, or 64 bits, and you've only got 16 bits to
change, you can delay loop while waiting. Is this what you're looking
for?

I'm not sure this is being responsive. I'm also not sure if this is
actually an electronics question, or a theoretical computer science
homework puzzle problem. Possibly another newsgroup might be better
able to give you a hand?

Chris

.

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