Re: TDS 1002 to read high voltage

I asked my profeesor about this question,and so this should resolve
the problem once and for all.
If a voltage divider is used with a ratio of 1:1000,and sufficiently
large values of R1 and R2,the current drawn from the input,and hence
the power dissipation can be made small(see calculations above)
As regarding phil's issue that the capacitance of the CRO strobe will
cause time delay issues,the problem does exist.However it is not as
sever as it might first seem because the thevenin equivalent ckt
across the capacitor only has a Resistance of R2.Since R2 is
relatively smaller,the RC product will be not be "too high".AND
RESISTORS DO NO HAVE A MAXIMUM VOLTAGE LIMIT(unless the voltage is
large enough and the gap between the resistor terminals is small
enough to cause arcing) .They only have a max power dissipation,whichj
has been shown in the above calculations to be achievable.The only way
to destroy a resistor is to burn it down,which only happens because of
excess POWER DISSIPATION,not excess VOLTAGE.
This ckt has the advantage that the peak current is limited to a very
small value.Hence the input source is never loaded too much.Loading is
ALWAYS with respect to current ,not with respect to resistance.
A variation of this method is used in chip design to figure out
frequencies of very fast clocks(ghz) without loading the input source.

As regards the second method,of using a capacitive divider,it has the
advantage that the RC product is much smaller than in the previous
case,but there is a HUGE reverse current which might cause problems
with the source.It also draws a huge current from the source in the
rising edge of the input waveform.
So the problem boils down to this.What are the characteristics of the
input source?Can it sinmk and source a large current in a short
time(2nd method),or can it only supply a small current(1st method).
This solely determines what method should be used.
Hope this helps the original poster.Enough of flaming on this thread :)

.

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