Re: Simple transistor NOT gate
- From: Allen Bong <allenbsf6502@xxxxxxxxx>
- Date: Sun, 3 Feb 2008 16:54:44 -0800 (PST)
On Feb 4, 2:29 am, John Larkin
<jjlar...@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:
On Sun, 3 Feb 2008 08:18:12 -0800 (PST), Chris <cfoley1...@xxxxxxxxx>
wrote:
On Feb 3, 1:52 am, Allen Bong <allenbsf6...@xxxxxxxxx> wrote:
Hi,
Is it possible to construct a simple inverter gate using 1 or 2
transistors and resistors?
I tried the circuit below but it doesn't work at all.
VCC
+
|
|
.-.
| |
| |4K7
'-'
|
+------o OUTPUT
|
1K_ |/
INPUT o-|___|----+---|
| |>
.-. |
| | |
4K7| | |
'-' |
| |
| |
=== ===
GND GND
Allen
(created by AACircuit v1.28.6 beta 04/19/05www.tech-chat.de)
You've described a perfect transistor inverter, that should work for
logic level inputs. A couple of things to check:
* Make sure you're using an NPN transistor instead of a PNP, a MOSFET,
or something else.
* Recheck your wiring, looking particularly at the pinout of the
transistor. It's easy to assume EBC when it's ECB, or vice versa.
* Use a voltmeter to actually measure the voltage at the input. If
you're driving the input from an open collector transistor or gate
output, no current will be injected into the base of your transistor
when your logic level is "high".
If you run through these three, the transistor has to be defective.
Replace it.
You've got the right answer right in front of you. Make it work.
Cheers
Chris
Classic RTL gate: should work.
But if you used this to drive another such gate, the second gate would
serious load down the output voltage of the first one. You could
juggle the resistor values to reduce this effect. Like maybe...
VCC
+
|
|
.-.
| |
| | 1K
'-'
|
+------o OUTPUT
|
10K |/
INPUT o-|___|----+---|
| |>
.-. |
| | |
open| | |
'-' |
| |
| |
=== ===
GND GND
John- Hide quoted text -
- Show quoted text -- Hide quoted text -
- Show quoted text -
Thanks very much Richard, Randy, Chris & John,
The gate was used to replace a 74LS04 TTL inverter used between the
output of 74LS138 and the LE input of a 74LS373 latch. The clock was
about 1.8Mhz. During a high the transistor conducts fine but during a
low input of short duration, I would not be able to get a high with my
logic probe nor the LE is triggered. The Vcc is 5V and the transistor
is a Japanese 2SC945 general purpose transistor.
I checked with google for a transistor NOT gate and it used 1K at
collector and 10K for the base and input. There was no resistor
between Base and Emitter. And I tried that circuit, it doesn't work
too. Where can I get the schematics for a RTL or DTL not gate?
TIA and regards,
Allen
.
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