Re: 8085 SBC needs help

Allen Bong wrote:
On Feb 2, 10:25 am, Allen Bong <allenbsf6...@xxxxxxxxx> wrote:

I have wired a simple SBC based on the basic 8085 chip. Using 74LS373
as a latch clocked by
ALE, 2716 for program storage, 2x 74LS138 for decoding the /CE for
2716 and the /IOR, /IOW,
/MR and /MW signals. I need only 1 bit input and 1 bit output so I
used 74LS373 for input
and 74LS244 for output. The input is connected to a switch and output
conmected to a LED.
When the switch is making, the LED will flash at about 1Hz. When the
switch is off, the LED
goes off. There was no RAM as my program doesnt use subroutines.
Actually the program is
less than 256 bytes so I tie A8-A10 of the 2716 to ground.
Below is the connection of the 2 decoders and the I/O.

74LS138 74LS138
.------. .------..
1 | Y0o----- /ROM CS 1 | Y1|-----/MR
A13----|A | /WR----|A |
A14--2-|B Y1o----- /RD----|B Y2|-----/MW
A15--3-|C | IO/M----|C |
| Y2o----- | Y5|-----/IOR
VCC--6-| | VCC---6| |
+--4-o | +---4| Y6|-----/IOW
+--5-o | +---5| |
| | | | | |
| '------' | '------'
| |
=== === VCC
GND GND |
.-.
| |
OUTPUT INPUT | |10K
74LS373 74LS244 '-'
.------. .------. |
D0-----3|D0 Q0|2----+ D0--18-|Y0 A0|-2---++
| | | | | |
| | .-. | | o |
/IOW--+ | | | | | | |=|
| | | | |470 | | o |
+------+ | | '-' | | |
| |\ | | | | | |
+-| >O--11|LE | | | | ===
|/ | | LED - | | GND
-----1|/OE | ^ -> /IOR---1-|/OE |
| '------' | '------'
=== VCC
GND

(created by AACircuit v1.28.6 beta 04/19/05www.tech-chat.de)

And the program I wrote to test the circuit.

.equ sensor, h'00
.equ led, h'00

.org h'0000

start: mvi a,h'ff ;turn off led at start
out led
mloop: in sensor ;check sensor
rar
jnc led_on
jmp mloop
led_on: mvi a,h'00 ;turn on led
out led
delay1: lxi d,h'ffff
dloop1: nop
dcx d
jnz dloop1
mvi a,h'ff ;turn off led
out led
delay2: lxi d,h'ffff
dloop2: nop
dcx d
jnz dloop2
jmp mloop
.code
.end

I was wondering if I didnt fully understand the instructions correctly
or the hardware was
in problem. On the 74LS138 I used for memory decoding, I was getting
pulses on all the
output instead of just Y0 output. The IO/M pin was a permanent lo and
the /WR signal from
8085 was always high.
Do I need extra signals on the enables for the decoders to decode
correctly?
Any feedback is much appreciated. Thank you.

Allen


I have just spotted a software mistake. The DCX D dosent affect the
zero flag when decrements through zero, so my program must have
stucked in a loop. SOme correction was made after the DCX D.

dloop1: nop
dcx d
mov a,d
ora e
jnz dloop1
[snip]
dloop2: nop
dcx d
mov a,d
ora e
jnz dloop2
jmp mloop

I have also included a link if you want to take a look at the
schematic.

http://www.flickr.com/photos/11236051@N08/2236545530/

Allen

This chip is similar to 8086? So the reset vector (well not really a vector on intels )
is in high memory? Where is that specified in the code?
Hmmm how do you even program 2716, LOL I may have 1 or 2 around here to but mostly 8K and up.

Well had to look up the reset on this chip, at 0? hmm .

As to the hardware .. quick look at the address decode.. it will work in this situation but really it divides the address space into 8 chunks not 16 AND YOU ARE NOT USING the /MR in decoding the /ROM CS, this will affect any output (writes) out of the CPU.
I'd connect /MR out of second 138 to one or both /G2 enables ( pin 4 and 5 )
of first 138.
To get this particular, 1 rom configuration going you could even do away with the first 138 and use the /WR to control the /OE or /CE of the ROM keeping the other grounded.


Oh, when will I have time to have similar fun with my 80C196.

Cheers.
.