Re: [LTSPICE] crystal circuit modeling settling time and certainty

"colin" <no.spam.for.me@xxxxxxxxxxxx> schrieb im Newsbeitrag
news:acyte.21413$jS3.12891@xxxxxxxxxxxxxxxxxxxxxxx
> Hi,
> Im trying to evaluate using a crystal as the tuned element of the phase
> shifter in a conventional quadrature FM demodulator (for extremly low
> modulation and narrow band PM detection)
>
> I have entered practical values for all the elemnts of the crystal
> (q=20000)
> however i find the settling time is rather long, although i set the start
> time to 1 second the voltage at the crystal is still rising seemingly
> linearly, and hence making the fine 100khz peak expected rather spread out
> and obscuring the sidebands, im wondering if its feasable to model this
> with
> any acuracy ? i could increase the time and maybe reduce tstep further but
> already it takes a long time to run.
>
> Colin =^.^=



Hello Colin,

The settling time is about 0.35/(f0/Q). This results in a
settling time in the range of 0.1s to 90% of the final value
(F0=100kHz, BW=f0/Q=5Hz).

I have summarized my ideas about crystal circuit simulation
from previous postings to user groups. Maybe not all are
necessary or helpful in your case.

1.
Switch off the data compression to achieve "clean" signals.
..options plotwinsize=0

2.
The maxiumim timestep in ".tran" have to be set to about
1/(1000*f0) or less. Of course this can become a nightmare
in terms of simulation time and size of the output file

3.
I recommend to use the ".save .." command to limit the
number of saved node voltages.


4.
Try to precharge the important nodes with ".ic" to
reduce startup settling time.

5.
Switch off marching waveforms to stop graphic output during simulation.
..options nomarch

6. Use a fast PC. The best choice is PC with a 4GHz AMD Athlon64.
I proved that with a 3.4GHz P4 and a 3.5GHz+ Athlon64(Venice).
The Athlon64 has been 25% faster.


Best regards,
Helmut




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