FET models

I would like to have a way of altering a FET model so that it follows the Vgs VS log(Is) instead of dropping rapidly near 1mA like:
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/ log(Is)
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Vgs

  Any ideas?

  Also, the model for the Fairchild FQD2N100 totally sucks.
  Is there a way to make it work?

..SUBCKT FQD2N100  d  g  s
Rg  g 1 0.04
M1 2 1 3 3 DMOS L=1u W=1u
..MODEL DMOS NMOS(VTO=4.66  KP=1.9  LEVEL=3)
Cgs 1 3 380p
Rd  d 4 3.5
Dds 3 4 DDS
..MODEL DDS D(BV=1050  M=0.42  CJO=35p  VJ=0.12)
Dbody 3  d DBODY
..MODEL DBODY D(IS=2.8E-13  N=1.00  RS=0.005  EG=1.10  TT=520n)
Ra 4 2 3.5
Rs 3 5 0.024
Ls 5  s 2.6n
M2 1 8 6 6 INTER
E2 8 6 4 1 2
..MODEL INTER NMOS(VTO=0  KP=10  LEVEL=1)
CGDMAX 7 4 380p
RCGD 7 4 1E7
DGD 6 4 DGD
RDGD 4 6 1E7
..MODEL DGD D(M=0.52  CJO=380p  VJ=0.12)
M3 7 9 1 1 INTER
E3 9 1 4 1 -2
..ENDS

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