Re: Strange ADC buffer amp design

From: Stefan Heinzmann (stefan_heinzmann_at_yahoo.com)
Date: 08/01/04 

Date: Sun, 01 Aug 2004 20:36:03 +0200

Ban wrote:
> Stefan Heinzmann wrote:
>
>>>>Appendix A Figure 24 shows the recommended input buffer schematics
>>>>which seems rather odd to me. Ok, it sorta works up to 100kHz, but
>>>>it looks rather unbalanced to me, with hints of phase problems. Is
>>>>there anything to be said in favour of it that I may have
>>>>overlooked? My own solution would look a lot more symmetrical, where the
>>>>inverting amplifier picks up its input from the signal source
>>>>rather than the output of the noninverting amp. I lashed up a
>>>>simulation of both circuits and on first glance mine looks a lot
>>>>cleaner. Anything specific I need to watch out for?
>>>>
>>>>I had no luck so far getting useful information from Cirrus btw.
>>>
>>>
>>>Stefan,
>>>I like those filters. the follower has 10k input impedance, whereas
>>>the inverter is very low (634R) to maintain the low noise of the
>>>DAC. The output phase compensation is needed because of the large
>>>2700p filter cap. So the whole filter is using the internal
>>>resistance plus 91R vs. 2n7*2 to gnd to form a first order LP, which
>>>rolls off at 300k. At higher frequencies the internal resistance
>>>goes up, so the filter is actually of 2nd order, but at lower
>>>frequencies it behaves only like a first order filter.
>>
>>I thought that because of the resistive feedback being picked off
>>behind the 91 Ohm resistor, the actual output impedance feeding the
>>filter cap is a lot lower than 91 Ohm, so the LP corner frequency
>>would be much higher. The 91 Ohm resistor together with the feedback
>>capacitor clearly is meant to prevent instability due to the large
>>capacitive load. I don't think it has much to do with LP filtering.
>>
>
> Yeah, the transition is soft, because with this compensation and the huge
> capacitive load the O/P resistance will rise depending on the opamp used to
> pretty high values from 50kHz on, and at 300k it will be probably even more
> than 100R, because the 470p will reduce the gain at high frequencies. It
> then stays constant until the ft-limitation kicks in. The 2700p across the
> A/D inputs will act as an integrator together with this resistance. It is
> needed because the chip uses switched sampling capacitors and those are
> charged from this big cap.

In the meantime I consulted Sergio Franco's Book (Design with OpAmps and
blabla 2ed) and crikey! I found the circuit being described as a low
pass noise filter (Figure 7.16). So you're right, it is both.

>>>The 2n7 cap also gives a symmetric filter response without using two
>>>different caps, since both ends are symmetrical. At higher
>>>frequencies there will be some slight assymetric behaviour, since
>>>one output is loaded with 634R, whereas the other with 634+91R. But
>>>what is important is the absolutely symmetric phase shift. Quite
>>>smart.
>>
>>I would have thought that picking the inverter's input from ahead of
>>the 91 Ohm resistor would cause phase and level problems at higher
>>frequencies. But thinking of it they will be high enough in frequency
>>as to be irrelevant.
>>
>
>
> It is not a good circuit, you are right, seems to be made by a digital
> designer.

Could have been me ;-)

>>>I would recommend a quad AD8674 for the opamp, So both channels share
>>>similar characteristics.
>>>Could you post your design as well to make a comparison.
>>
>>Here is the LTspice schematics. I chose the LMV721 because it can
>>drive the capacitive load without resorting to isolation resistors,
>>which saves me a few parts. You would have to get the model from
>>National if you wanted to simulate it. The input impedance is also
>>10k, as you can observe. R9 is the impedance internal to the CS42428,
>>according to the data***. V2 represents the VQ output of the
>>CS42428, which I chose as the biasing source, but it needs buffering.
>>I haven't yet looked at the noise, which may be the major catch.
>>
>
>
> Well, if you want to save parts, you better not do it that way :-)
> The noise will be around 4 to 5 times(!) higher than what I drew here:
>
> ||100u |\ 3/4 AD8674
> o--||--+------|+\ |\
> || | | >--+------|+\ ___
> .-. +-|-/ | | >--+-|___|-+------+-o
> 10k| | | |/ | +--|-/ | 91R | |
> | | | | | |/|| | | |
> '-' +-------+ +----||--+ | |
> | | | || | |
> | | | ___ | |
> | | +--|___|---------+ |
> | | 475R ---
> | | ___ 2700p ---
> | .-. +--|___|---------+ |
> | | | | 475R | |
> | 475R| | | || | |
> | '-' +----||--+ | |
> | | | |\|| | | |
> | +---+--|-\ | ___ | |
> | | >--+-|___|-+------+-o
> +---------+---------|+/ 91R
> | | + |/
> | ###
> oUref ---
> |
> ===
> GND

Yeah, it dawned on me that noise would be the problem. I knew that there
had to be a smarter way! Thanks, Ban!

The output voltage capability of the AD8674 is scratching the limit with
a +/-5V supply. It is also a rather expensive part. I have to think
about this a bit more. 

-- 
Cheers
Stefan