Re: Pseudorandom Hashing

From: John Fields (jfields_at_austininstruments.com)
Date: 09/23/04


Date: Thu, 23 Sep 2004 18:39:10 -0500

On Thu, 23 Sep 2004 14:40:28 -0700, Tim Wescott
<tim@wescottnospamdesign.com> wrote:

>I am having trouble coming up with the right keywords to do a web
>search, so help me out here:
>
>There is a technique where, to significantly reduce the probability of
>getting a long string of zeros, a message is run through a CRC
>generator, and the output bits are taken off. The transmitted message
>is thoroughly hashed, yet it is a simple matter of a shift register and
>some XOR gates to decode the message on the other end.
>
>I thought I knew how to do this, yet in trying to actually make it work
>I find that over half of my brain cells appear to be attending a
>management seminar.
>
>So, know where I can find out how to do this right? "pseudorandom" and
>"hash" get me tons of cryptography, but not what I'm looking for.

---
Is this what you had in mind?
                                    A-----------+
        +------------------------Y EXOR         |
        |                           B--+        |
        +--A                           |        |
         EXOR Y--[D Q]---[D Q]---[D Q]-+-[D Q]--+--->DATA OUT
DATA IN>-- B
Each [D Q] is a stage of a shift register, and as each new data bit is
presented to the first EXOR, it's EXORed with the EXOR of older bits
which have propagated down the chain and been EXORed with each other.
The result is that the DATA OUT stream of bits is scrambled and bears
no resemblance, on the surface, to DATA IN.
In order to recover DATA IN,  the DATA OUT stream is presented as DATA
IN to an identical shift register / EXOR circuit and, if they're both
synced up (the circuits) what comes out of the receiver will be
exactly what went into of the transmitter.
Depending on what goes into the transmitter input, there may be long
strings of ones or zeroes which come out of the output.  This can be a
bad thing for synchronous data modems which use data transitions to
keep their their 'dot clocks' in sync with incoming data, so what's
done to circumvent that is that a counter is placed in the transmitter
circuitry which counts ones and/or zeroes, and if a certain number of
them occur, in a row, then a one or a zero is stuffed into the data
stream (or a bit is flipped) to break up the sequence.       
-- 
John Fields


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