Re: Shared clock and data pins

From: Jonathan Kirwan (jkirwan_at_easystreet.com)
Date: 11/07/04


Date: Sun, 07 Nov 2004 21:56:20 GMT

On 7 Nov 2004 12:55:10 -0800, dave.harper@gmail.com (David Harper) wrote:

>I'm relatively new to A/D converters and such, and was wondering if I
>can put two or more A/D converters on the same clock and/or data out
>lines, while leaving the CS pins on different lines? Or maybe sharing
>the CS and clock pins, leaving the data out lines separate?
>
>My goal is to minimize pin use on the microcontroller.

The CLK line is an output from your micro and an input to all the serial ADCs,
so that can be wired in common. The DATA lines are outputs from the serial ADCs
and that's a problem. You can either wire the DATA lines to separate pins on
the micro or else check to see if the DATA line goes tristate if the CS line is
inactive. If so, then wire them in common as well and just don't drive two CS
lines active at once. The CS lines will need to be on separate lines to the
micro. If you have more than a few ADCs you can use a binary decoder, like the
74LS138 or the 74LS154, to reduce micro pin count at the expense of another IC.

Jon



Relevant Pages

  • Re: Shared clock and data pins
    ... >the CS and clock pins, leaving the data out lines separate? ... The CLK line is an output from your micro and an input to all the serial ADCs, ...
    (sci.electronics.basics)
  • Re: Shared clock and data pins
    ... > the CS and clock pins, leaving the data out lines separate? ...
    (sci.electronics.design)
  • Re: Shared clock and data pins
    ... > the CS and clock pins, leaving the data out lines separate? ...
    (sci.electronics.basics)
  • Re: Shared clock and data pins
    ... >the CS and clock pins, leaving the data out lines separate? ... If it's SPI, you can common the clock and data lines, and have ...
    (sci.electronics.design)
  • Re: Shared clock and data pins
    ... >the CS and clock pins, leaving the data out lines separate? ... If it's SPI, you can common the clock and data lines, and have ...
    (sci.electronics.basics)

Loading