Re: PCB Power Trace Widths, Ground Planes, and Routing
From: John Larkin (john_at_spamless.usa)
Date: 12/26/04
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Date: Sat, 25 Dec 2004 20:21:29 -0800
On 25 Dec 2004 19:23:09 -0800, "Apparatus" <apparatus.home@lycos.com>
wrote:
>Thank you for your informative replies.
>
>I'm using a two layer board since it is $33 at www.33each.com with the
>student discount. I suppose I could go to a four layer board. How much
>more do these usually run? (The price isn't listed on 33each.com. I
>need to call for a quote.)
>
Spend a few more bucks on a 4-layer. You want this to work the first
time, don't you?
>What speed qualifies as high speed? Which buses qualify as highly
>active buses? The ARM is able to be clocked up to 66MHz, but I'm
>running it at 20MHz (4x 5MHz osc. via PLL) to avoid much these high
>speed effects. The ethernet section is running at 20MHz as well, but
>off a separate crystal to allow me to clock the ARM faster,
>independently of the CS8900. The TI Codec is running at 2.048MHz of
>another osc. The ARM has an 18-bits of the address bus running to SRAM,
>1-bit to the LCD controller, and 3-bits to the CS8900. The 16-bit data
>bus runs 16-bits to SRAM and the CS8900, and 8-bits to the TI Codec and
>LCD Controller. During development, SRAM will hold program code and be
>frequently accessed. The TI Codec and CS8900 will be the other two
>frequently accessed chips (VoIP application).
>
The frequency isn't as important as the edge rates and power supply
dI/dT. A "fast" part run at a lower-than-max clock rate still needs to
be treated as a fast part.
>Should I make separate analog ground planes for the TI Codec and
>CS8900?
No.
> Why do the chips have separate analog and digital grounds (AVss
>and DVss)?
So that, internal to the chip, digital ground bounce doesn't mess up
the analog stuff too badly.
>Can I connect these to one ground plane?
Yes.
>
>The 5V is to power an onboard LCD the CPLD LCD controller. The 2.5V is
>the supply for the ARM core. The rest of the system is 3.3V. So I
>should make the power plane 3.3V and run 100 mil traces in the same
>layer (maybe around the edges?) for the other two supplies?
I usually make pour pours around each chip at the appropriate
voltages. If things work out, you can slice up the power plane into
cleverly shaped islands that connect everything with fat regions
everywhere. If not, use power islands around chips and run fat power
feeders (50-100 mils) to the islands from your power supplies.
> How can I
>tell the auto-router to make the trace smaller as it gets closer to the
>SMT chips?
99.99% of autorouters suck 99.99% of the time. Just do it by hand.
Routing is fun.
John
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