Re: Is microprocessor an integrated circuit???

From: Thaas (mysig_at_sprynet.com)
Date: 01/27/05 

Date: Thu, 27 Jan 2005 14:18:42 GMT

On Wed, 26 Jan 2005 22:23:18 -0000, "Andrew Holme" <andrew@nospam.com>
wrote:

>Bradley1234 wrote:
>> PLEASE show an example of a microprocessor that doesnt use microcode
>
>Broadly speaking, it depends whether the microprocessor is RISC or CISC:
>RISC (Reduced Instruction Set) processors don't use microcode - they have
>"hard-wired" logic; CISC (Complex Instruction Set) processors generally do
>have microcode. The exact definitions of RISC and CISC are somewhat
>contentious. The 6502, which is often said to be the first RISC processor,
>was not microcoded.
>
>
In the 1970s minicomputers had what are now retroactively defined as
"complex" instructions to perform operations like say allocating a
free page of physical memory to a program's virtual address space. In
the Modcomp IV this was the AMEM instruction. Two other "complex"
instructions in that machine were the MMRB (Move Memory to Register
Block) and MRBM (Move Register Block to Memory).

These instructions were implemented in the machine's
firmware=microcode=microprogram which resided in ROM and was executed
by the CPU's "microengine". In later minicomputers we started using
SRAM for the "microstore" that held the firmware because it made
changing the firmware and even manufacturing the CPU board easier. We
started calling the microstore implemented in ram WCS (Writeable
Control Store).

Sometimes a firmware programmer would bring a firmware update into the
lab on a floppy disk and insert it into the computer saying "This
won't affect you." Inevitably it crashed something so we coined the
term "fluffware" for microcode produced by this programmer in
particular and any microcode stored in WCS in general. Later
fluffware came to be used as a pejorative marketing term to describe
over-hyped applications marketed by companies that never actually
produce the product described.

The "complex" instructions were implemented in firmware because it was
more efficient. The manipulation of the internal registers and
counters needed to execute an AMEM, MMRB, or MRBM were faster when the
microinstructions were fetched from the microstore rather than
fetching a series of machine-language instructions from memory to
perform the same operation.

Later SRAM was added to the machines as cache memory. Speeds advanced
to the point where fetching a simple machine-language instruction or
operand from cache approached the speed of fetching a microinstruction
from the WCS or an operand from a register. At this point it makes
less sense to have a "complex" instruction. The same operation can be
performed as quickly using a series of simpler instructions fetched
from memory (cache). Thus RISC.

My point is that RISC does not mean hardwired. When the advantages of
speed and flexibility of the microengine are matched by improved cache
and memory speeds, hard-wiring instruction logic makes more
engineering sense. Therefore it makes sense that many or most RISC
processors would not use microcode, but a microcoded CPU could still
be RISC. 

-- 
Thaas

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