Re: UC3843 power supply help needed!!!


<seegoon99@xxxxxxxxx> wrote in message
news:1116227614.747750.258110@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Hi to all.
I have built a power supply using a uc3843 chip and need some help.
The supply takes 220Vac and steps it down to 14Vdc(approx).
I have managed to get the supply working OK , but I still need a bit of
help.The schematic is attached , in LTSpice format.I modeled the
schematic and it seems to be ok , but I'm not sure how much you can
trust a simulation it this sort of level.
I've attached the model file for anyone who would like to simulate the
schematic. Hope it does not make the file to big , but I don't have any
access to any other binary groups to send it to.

When I first powered up the circuit the output was very noisy , and got
worse as the load increaced.I found by lots of trial and error that if
I put a small(100pF) cap across R11(3k3) the output stabilizes and
everything seems good.There is a bit of high frequency noise on the
output at the switching frequency , but I am sure this is to be
expected.
Now the problem...

I found by checking the drive to the FET that the loop seems unstable
at certain loads.As I increace the load from 0A to 2.5A
you can see the gate drive pulse width increacing as expected , but at
certain loads it seems to jump all over the place and the scope can't
trigger.From about 300mA to say 1,5A the gate drive is a mess , and
after that it seems to settle down nicely.

How do I go about fixing this.It does not seem to be causing a problem
on the output , but I would like to fix it up anyway.
I am sure it is a loop/compensation problem , but I am not sure how to
go about fixing it.I have tried changing the gain resistor(R5) to 100k
and 147K to no avail.Same with the compensation cap C2(100p / 200p). I
have also fiddled with the resistor/cap combination around the TL431 ,
also without much luck.
I am not very experienced with this type of power supply , so I am in
the dark a bit!!
It may also be a board layout problem.I did the board in a hurry
and did not pay HUGE amount of attention to layout , but I did try and
keep high current areas away from control lines etc.It is single sided.
This is a sort of hobby project , so time is not really of the
esscence. I only have a scope and meter to work with , so any solutions
that involve using other expensive equipment will be out of my
capability.My maths is also not very hot , so any solution that involve
lots of complex maths may be beyound me , but post them anyway as the
may be of interest to someone else.(they will be of interest to me ,
even if over my head!!)


ive used this chip in probaly a dozen designs, its a realy neat little
package, i cldnt load your circuit, but if u cld post a jpg il have a look
at it, the spec *** for this device is realy good, if u have loop
stability problems you realy need to analyse your loop charecteristics
carefully.

with opto feed back you need to acount for the wide variation in loop gain
they can have.

some designs rely on a smal amount of esr in the output caps to ensure
stability, although persoanly i would try to avoid this.

with current mode control its realy easy to charecterise the output, its
just like a big integrator, so
any roll of in the rest of feedback loop needs to occur when the overall
gain is less than 1. finding the loop gain at wich it becomes unstable and
reducing it by a factor of 2 or so is one posibility.

Colin =^.^=


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