Re: Help with HV common emitter and push pull stage amplifier
- From: Fred Bloggs <nospam@xxxxxxxxxx>
- Date: Thu, 30 Jun 2005 10:41:06 GMT
Winfield Hill wrote:
Robert Baer wrote...
nikNjegovan@xxxxxxxxx wrote:
Hello all,
I'm designing a high voltage amplifier and running into problems that I'm sure that one of you might be able to guide me through.
Presently I have an operational amplifier (OPA37) driving a common-emitter amplifier stage (NTE287) feeding into a push-pull stage (NTE287 and NTE288) and then feeding back to the opamp.
Link to circuit diagram: http://www1.pacific.edu/~nnjegova/Circuit.TIF
(disregard the split collector resistor it was there to allow for a terminal that I could bootstrap to the input which by the way did not help with gain)
I'll need the following specifications:
input: +/- 15V (from another opamp) freq = (100Hz to 10kHz) possible > most signals will be near 1kHz
The output compliance must be at least +/- 180V (ideally +/- 200V take a diode and current limiting resistor drop), and will be driving no more than 1mA (typically 20uA) through 1M (that's right, MegaOhm) of impedance.
My supply rails can reach +/-(200V to 500V) and source 3mA of current out of each rail at maximum load
Right now I can input +/- 10 V (the output clips at anything above 10V) at 1kHz and get an approx +/- 100V output. However I have thermal instability with that gain (15 min and the output is distorted) and a problem with attenuation at the other frequencies. I've tried a bypass capacitor at the emitter in order to avoid thermal instability but when I connect it I find that my output gets extremely distorted.
I've been trying different resistor values, especially with a higher collector and lower emitter but I can't seem to get anymore gain out of this circuit, just DC offset. I would like to just use bjts but I have a couple of high voltage mosfets if needed. Also, I've been searching this group and found the great diagrams that Dr. Hill posted for the "basic high voltage mosfet dc amplifier" (by the way thanks for authoring that great book) and I might go down that road if I cant get my design working, but I was hoping that I could get an idea of why my design won't give me the gain I was hoping for, as well as why it is thermally unstable. I have the second edition of AoE if anyone wants to reference it in their reply.
Thanks in advance and thanks for the discussions that you have all had in the past about this topic.
1) You have too much attenuation of the DC signal from the output of
the opamp to the base of the inverter. Use a zener insead of a large
value resistor; the bypass is OK.
2) The gain of the inverter (about 130/12) seems to be less than the feedback gain (1/14); that may cause a problem.
3) Check the over phase shift VS ferquency for possible compensation corrections.
Here's your faulty circuit:
. +-------+--- +200 . | | . 123k | . R2 | | . ,-- 140k --, +--- pushpull out . in | | ,---||---, | emitter -----+--- . -- 10k --+--|- \ | | | C follower | . | >---+-+- 480k -++-- B | | . ,- 10k --+--|+ / | E | | . | | A1 9k | | | . gnd | | 12k | | . | | | | | . | +-----+-------+--- -200 | . '-- 140k ---------------------------------------'
The first thing that's wrong with your circuit is the opamp error amplifier A1, which should have infinite gain at DC to remove all the offset voltages from the HV output stage. That means that R2 should be replaced by an integrating capacitor, plus a resistor in series, adding a zero in the feedback to help stabilize the loop.
The second thing that's wrong is you've failed to add a respectable level-shifting circuit to run the CE transistor Q1 at -200V. E.g., using a PNP common-base stage, Q2, like this:
. +-------+--- +200 . | | . 390k | . C2 | | . ,-||- R2 -, pnp level +--- pushpull out . in R1 | | shifter | emitter -----+--- . -- 91k --+--|- \ | Q2 C follower | . | >--+- 68k --E C--+-- B Q1 | | . ,- 100k -+--|+ / B | E | | . | | A1 | 3.3k | | | . gnd | -15 | | | | . | +-----+-------+--- -200 | . '-- 1.40M -----------------------------------------'
It's not clear that degenerating the Q1 stage gain is a good idea.
This circuit still lacks a decent output stabilization scheme, and a class-AB output stage with defined-bias, plus foldback current limiting, but it's a start.
I was favoring something more like this:
View in a fixed-width font such as Courier.
.. .. .. 200V .. | .. +----+ .. | | .. | | .. 510k 2.2M .. | | .. | | .. | | .. | | .. +----|--PUSH -+----> .. in R1 Q1 | | PULL | .. -- 1.5M-----|+ \ Q2 | | | .. | >--+-1k-E C--68k-+-- E C | | .. +---||---+--|- / | B | B | | .. | 47n | A1 | | 560 | | | .. 100k | | gnd | +------+ | .. | | | | | | .. | | C2 | | | | .. | +-||- R2--+ +--|<|-|<|---+ | .. gnd | | | .. | | | .. | -200V | .. | | .. '-- 1.50M --------------------------------------+ ..
.
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