Re: CMOS LVC bypass & design practices

John Larkin wrote: 
On Thu, 11 Aug 2005 11:29:14 +1200, Terry Given <my_name@xxxxxxxx>
wrote:


John Larkin wrote:

On Wed, 10 Aug 2005 17:06:23 GMT, Dave Boland
<NODARNSPAMdboland9@xxxxxxxxxxx> wrote:



When I used to use TTL general logic (yes, that was a few years ago) I used ceramic .1 uF caps. for bypassing Vcc to ground. I was looking on the web to see if that has changed for CMOS, LVC in particular, but didn't find much. Is this still a good choice and will using an SMT cap be of much benefit to performance?

I was also looking for some simple design practice rules for CMOS, but all I found was some very long and excruciatingly detailed white papers. Is there somewhere this is netted out in a clear and concise manner?

Thanks for the help.


Dave, 



This is simple:

Use a multilayer board with a solid ground plane layer and a solid Vcc
layer, but the Vcc layer can be reasonably chopped up into pour areas
if you have multiple voltages. Multilayers are cheap nowadays.

Keep the dielectric thin (.005 inches, maybe) between Vcc and ground
planes.

Each IC has vias to Vcc and ground, close to the pins.

Scatter a modest number of surface-mount 0.1 to 1.0 uF caps, 0805 or
0603 size, around the board. You don't need one per IC, nor do they
have to be very close to IC pins; the planes themselves are the fast
bypasses.

Ignore advice that recommends...

 Splitting ground planes
 Star grounding
 Bypass per chip
 Bypass per Vcc pin
 Mixing cap sizes to stagger resonances
 Any nonsense about logic return currents

A big chip like an FPGA could have 2 to 4 ceramic caps per power rail;
certainly not one per power pin.

A couple of big caps per board are good to absorb gross/slow current
surges. Use aluminums or polymer tantalums, ***not*** MnO2
(conventional) tantalums.

When in doubt, use fewer caps. 

IFF one knows what one is doing.


John

If you dont have a Vcc plane, a cap per Vcc pin is not a bad idea at all. And by the time there are a few hundred of them, it would have been cheaper to use a Vcc plane....



I saw a largish PC board somewhere, maybe 16" square or so, that had
over 3000 bypass caps.

*** me! Pardon my french, but thats out of control! I've never even cracked the century. How did they find room for the ICs?


I wonder what the world record is. 

good question.



John

The antithesis to this is how I made a living as a tech - fixing Korean knock-off videogame PCBs. Pole Position was the worst, a couple of 2'x1' PCBs, many hundreds of LSTTL chips, 2-layer grid Vcc/0V layout, and *NO* bypass caps. A tech I knew taught me the trick of adding a bypass cap to every 5th IC (the holes were there) before looking for faults. Mysteriously, most boards were NFF after this treatment.

Cheers
Terry
.

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