Fail safe input
It can be achieved easily if you connect a resistor to the power signal
and this will place a high voltage on the input line. A look at TI's
old design in LVDS drivers has the input lines connected to the power
line thro' a high resistor(300k). But the simulations work for even a
low resistor(say 1k).Why is it a very high value?Am i missing something
fundamental about simulation program here.
.
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