Re: Switching losses in half bridge

Pooh Bear wrote:
John Popelish wrote: 

Is your approximately 5 mA load current (320/2/33000) changing the
drain voltage much, during the dead time?


Not visibly. You mean as in dragging the output voltage towards Vbus/2 ? That
point has intruiged me in its own right.

That means that all the drain voltage swing comes from a nearly zero ohm source... the other fet.

Has the gate voltage of the turning off fet gone through almost all of
its swing during the 1.5 us dead time, before the other gate swings on?



I don't recall looking at it recently but it damn well should be ! It's got
an IR2013 driver and about 10 ohms Rg.



Does it stay in the off state when the other fet turns on, or does the
gate voltage bounce back into the transition region during the drain
voltage swing?



Erk ! I don't think so. You're thinking of  the 'Miller capacitance ' effect
? The IR2013 ought to keep that sorted.

That driver is connected to the gate through 10 ohms. The gate is connected to the other fet through the drain to gate capacitance and the only thing limiting the current is the drain to source resistance and the rate of change of the voltage. Which do you imagine will be stiffer?

I think your turned off fet is turning back on during the drain voltage swing.

Do the neighbors complain about TV interference during your testing? ;-) 


No - lol. No neighbours. The office is in an industrial park. No adverse
signs locally either.

Incidentally when driving the transformer - there's no noticeable temp rise.
And the output waveform looks truly lovely. Nice slow transition from 'rail
to rail' almost perfectly matched to the dead time. Lmag ~ 900uH btw.

The transformer inductance is swinging the drain voltage during the dead time, as the gate voltage drops, but its impedance is high enough to lose the tug of war with the gate driver during the slew. This is a weird case where less load causes more loss because the slew doesn't take place during the dead time.
.