Re: High Side Pulse Transmitter

On 13 Oct 2005 07:28:50 -0700, Winfield Hill
<Winfield_member@xxxxxxxxxxx> wrote:

>Fred Bloggs wrote...
>> John Larkin wrote:
>>> Winfield Hill wrote:
>>>> John Larkin wrote...
>>>>> Winfield Hill wrote:
>>>>>> John Larkin wrote...
>>>>>>
>>>>>>> Are you and Fred telling me you can't figure out how do
>>>>>>> this with 5 parts? How disappointing.
>>>>>>
>>>>>> I haven't been following. Is this a circuit for making a
>>>>>> +12V / -5V, 0.25A-capable gate-drive pulse from a wimpy
>>>>>> TTL logic signal? I can see doing it crudely with six
>>>>>> parts, but five ... ???
>>>>>
>>>>> No, that's something else. It's described in the original post.
>>>>> Logic in, output swings from V+ to V+ minus 6 volts, where V+
>>>>> is pretty big.
>>>>
>>>> I see, 24 to 50V.
>>>>
>>>>> I didn't read the op's specs carefully, so my first suggestion
>>>>> swung V+ to ground (Fred trapped me on that one) but the
>>>>> limited-swing version can still be done with 5 discretes,
>>>>
>>>> Yes, five.
>>>>
>>>>> 6 if you include current limiting.
>>>>
>>>> Yes, assuming V+ current limiting only, and all loads to the
>>>> most negative output voltage. Crude, but workable.
>>>
>>> I prefer the term "elegant" to "crude."
>>
>> It's a bunch of conceptual garbage:
>>. V+
>>. |
>>. +-----------+
>>. | |
>>. z [Rs]
>>. a |
>>. | ||-
>>. +--------||>
>>. | ||-
>>. | |
>>. +---|>|-----+------>
>>. | |
>>. | ||-
>>. CMOS IN>---------|--------||<
>>. | ||-
>>. | |
>>. [Rb] [Rs/2]
>>. | |
>>. --- ---
>>. /// ///
>
> Right. Judged by the O.P.'s specs, that one is a bunch of
> conceptual garbage. Also, it doesn't meet most of the specs,
> e.g. it's inverting, etc. I'm sure it's not John's circuit.
> Certainly it's not what I had in mind.
>
> Here are Jeff Stout's specs:
>
>1. True logic; high input produces high output, etc.
>2. Operates with Vcc from 24V to 50V.
>3. High output is slightly less than Vcc, low is better than
> 6V less than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
>4. Rising and falling edges should be as fast as possible.
>5. Load is from 10mA to a maximum of 125mA, and capacitance
> from 0 to about 1.5uF.
>6. spends most of its time in the high state.
>7. It transmits a signal between 1200 BAUD, and 9600 BAUD
> with a duty cycle of less than 10%.
>
> Here's something like the five-part circuit I imagine John had
> in mind. It can provide a non-inverting 6V output with better
> than 10us risetime, assuming high-gain transistors, like those
> sold by Zetex. The circuit features a level-shifting current
> source (sink actually), which also sets the 6V output swing for
> the emitter followers. A power resistor can be added in Q3's
> collector for current limiting (the 6th part John mentioned).
>
>. ------+------+---- + rail
>. | | 24 to 50V
>. 1.0k |
>. | |/
>. +----|
>. | |\e
>. | Q3 | noninverting 6V swing
>. | +--- output to 1.5 uF load
>. | Q2 |
>. | |/e Imax = 750mA
>. +----| BJT beta > 150
>. | |\ dv/dt = i/C = 6V in < 12us
>. Q1 | |
>. |/ |
>. +5 ----| gnd etc
>. |\e |
>. 620 | V 6.3 mA for
>. o--/\/\---' logic LO
>. IN: 5V cmos logic
>. with 60-ohm gate Ron
>
> Just to show it can be done with five parts. A few more parts
> could be used to improve the circuit, of course. Jeff can test
> it with spice, if he has the right transistor models.


Yup. Might could use fets, or maybe darlingtons, depending on the
swing requirements.

A depletion fet might be fun for the upper one.

John



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