Re: PLL Lock to an Offset Frequency

Jim Thompson wrote: 
On Fri, 14 Oct 2005 06:15:08 -0500, "hashemi7102"
<novinmadar@xxxxxxxxxxx> wrote:


Hi
I want to design a PLL which must lock to a
frequncy which is a bit different from input frequency.
For example input Frequncy is 8MHz and PLL must synthisize
a 8.125.000Hz or 7.875.000Hz (8MHz+- 125KHz) output signal.


How can i do this?

Hanse Hashemi




Divide 8MHz by 64 for reference input (125KHz) then use div63 or div65
in the feedback.

OR:

Use a single-sideband mixer to mix 125KHz with 8MHz.

...Jim Thompson

If you use a frequency-phase detector or other very asymmetric PD, you don't even have to use an SSB mixer, because the unwanted null is unstable. On each sideband, one null is unstable because of the sign of the loop gain. On both sidebands, the null at +- pi is unstable because of huge loop gain. Only one of the four nulls is stable.

Cheers,

Phil Hobbs

.

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