Re: PLL Lock to an Offset Frequency

On Fri, 14 Oct 2005 11:49:51 -0400, Phil Hobbs
<pcdh@xxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:

>Jim Thompson wrote:
>> On Fri, 14 Oct 2005 06:15:08 -0500, "hashemi7102"
>> <novinmadar@xxxxxxxxxxx> wrote:
>>
>>
>>>Hi
>>>I want to design a PLL which must lock to a
>>>frequncy which is a bit different from input frequency.
>>>For example input Frequncy is 8MHz and PLL must synthisize
>>>a 8.125.000Hz or 7.875.000Hz (8MHz+- 125KHz) output signal.
>>>
>>>
>>>How can i do this?
>>>
>>>Hanse
>>>Hashemi
>>>
>>>
>>
>>
>> Divide 8MHz by 64 for reference input (125KHz) then use div63 or div65
>> in the feedback.
>>
>> OR:
>>
>> Use a single-sideband mixer to mix 125KHz with 8MHz.
>>
>> ...Jim Thompson
>
>If you use a frequency-phase detector or other very asymmetric PD,

Huh? A PFD isn't asymmetric.

Reread my first example: 65/64*8MHz = 8.125MHz, 63/64*8MHz = 7.875MHz



> you
>don't even have to use an SSB mixer, because the unwanted null is
>unstable. On each sideband, one null is unstable because of the sign of
>the loop gain. On both sidebands, the null at +- pi is unstable because
>of huge loop gain. Only one of the four nulls is stable.
>
>Cheers,
>
>Phil Hobbs

My second example, elaborating: 8MHz/64 = 125KHz, then MIX in an SSB
mixer to get the +/- desired. No PLL needed, just some phase shifters
;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
.

Relevant Pages

  • Re: PLL Lock to an Offset Frequency
    ... >> I want to design a PLL which must lock to a ... >> frequncy which is a bit different from input frequency. ... >> For example input Frequncy is 8MHz and PLL must synthisize ...
    (sci.electronics.design)
  • Re: PLL Lock to an Offset Frequency
    ... > frequncy which is a bit different from input frequency. ... > For example input Frequncy is 8MHz and PLL must synthisize ... which is to design a PLL running at nominally ...
    (sci.electronics.design)
  • Re: PLL Lock to an Offset Frequency
    ... > I want to design a PLL which must lock to a ... > frequncy which is a bit different from input frequency. ... > For example input Frequncy is 8MHz and PLL must synthisize ...
    (sci.electronics.design)
  • Re: PLL Lock to an Offset Frequency
    ... I want to design a PLL which must lock to a frequncy which is a bit different from input frequency. ... For example input Frequncy is 8MHz and PLL must synthisize ... one null is unstable because of the sign of the loop gain. ...
    (sci.electronics.design)
  • Re: PLL Lock to an Offset Frequency
    ... >I want to design a PLL which must lock to a ... >frequncy which is a bit different from input frequency. ... >For example input Frequncy is 8MHz and PLL must synthisize ...
    (sci.electronics.design)
Loading