Re: PLL Lock to an Offset Frequency

Jim Thompson wrote: 
On Fri, 14 Oct 2005 13:59:36 -0400, Phil Hobbs
<pcdh@xxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:


Jim Thompson wrote:

On Fri, 14 Oct 2005 11:49:51 -0400, Phil Hobbs
<pcdh@xxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:



Jim Thompson wrote:


On Fri, 14 Oct 2005 06:15:08 -0500, "hashemi7102"
<novinmadar@xxxxxxxxxxx> wrote:




Hi
I want to design a PLL which must lock to a
frequncy which is a bit different from input frequency.
For example input Frequncy is 8MHz and PLL must synthisize
a 8.125.000Hz or 7.875.000Hz (8MHz+- 125KHz) output signal.


How can i do this?

Hanse Hashemi




Divide 8MHz by 64 for reference input (125KHz) then use div63 or div65
in the feedback.

OR:

Use a single-sideband mixer to mix 125KHz with 8MHz.

...Jim Thompson

If you use a frequency-phase detector or other very asymmetric PD, 


Huh?  A PFD isn't asymmetric.

Reread my first example:  65/64*8MHz = 8.125MHz, 63/64*8MHz = 7.875MHz





you don't even have to use an SSB mixer, because the unwanted null is unstable. On each sideband, one null is unstable because of the sign of the loop gain. On both sidebands, the null at +- pi is unstable because of huge loop gain. Only one of the four nulls is stable.

Cheers,

Phil Hobbs 


My second example, elaborating:  8MHz/64 = 125KHz, then MIX in an SSB
mixer to get the +/- desired.  No PLL needed, just some phase shifters
;-)

...Jim Thompson 

Of course it's asymmetric.  The voltage vs phase plot is a sawtooth.

Cheers,

Phil Hobbs 


Not on either side of zero phase it isn't... it's linear thru zero.
With a PFD you could care less about ±pi.

...Jim Thompson

Jim, with all due respect, you need to think about what I wrote in my original post. The sign of the loop gain is opposite for USB and LSB for a given PD null, i.e. if you use an XOR or a diode mixer whose nulls are at quadrature, if the loop wants to lock up at +pi/2 on USB, it'll lock up at -pi/2 on LSB. With a PFD, one sideband will have the right sign of loop gain to lock up at 0, where (as you point out) everything is copacetic.

The point I was making in my original post is that the other sideband will have to try locking up at +- pi, where there's a ruddy great cliff--its PD gain there is like Vdd /2*pi*(f_0*t_PD), i.e. something like 500 times larger than the other null. Of course it's noisy and possibly metastable there, but the point is that the loop gain is _huge_, so no lock will occur there. Thus with a tiny bit of acquisition aiding, e.g. 2 resistors and a cap in positive FB around the loop amplifier, you can make a reliable lock to one sideband and not the other, _without_needing_a_SSB_mixer_.

Cheers,

Phil Hobbs

.

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