Re: MOSFET body diodes


"Terry Given" <my_name@xxxxxxxx> wrote in message
news:1130188291.913848@xxxxxxxxxx
> John Larkin wrote:
> > I have blown fets in h-bridges driving motors, at very low currents.
> > Seems the substrate diodes had a snap recovery characteristic that
> > blew the gates out somehow. These were older power fets, and I think
> > some newer parts are rated to survive this.
> >
> > John
> >
>
> Hi John,
>
> Win mentioned this in a post a few months back - seems the snap-off can
> be sub-ns, and the resultant enormous dI/dt drops enough V across stray
> L to over-voltage the gates.
>
> If we guess Lstray = 10nH and Vsplat = 30V, Idead = 30V*1ns/10nH = 3A.
> So with sub-ns snap-off, its probably fairly easy to do....
>
> Cheers
> Terry


This is an interesting theory, but I find it hard to believe. Any parasitic
Lstrays in series with the drain or source would tend to cause the drain
voltage to increase, and source voltage to decrease. The gate however is a
relatively large capacitor, and it's voltage cannot change instantly. Any
change in gate voltage must be supplied with current through the gate driver
circuit. The really important thing however, is that the body diode snap
off event would try to increase the gate source voltage (for an N-channel
device). As the gate source voltage were to increase beyond the threshold
voltage of the MOSFET, the device would begin to turn on, thus inherently
limiting the peak dI/dt event, and consequently, the maximum gate-source
voltage reached.

Far more likely in my mind is the high speed snap off will cause the
drain-source voltage to increase sufficiently that it will cause
drain-source avalanche. The drain-source capacitor is much smaller than the
gate source capacitor, so the drain source voltage is free to change much
more readily by stray L's than the gate source voltage. Note that the peak
avalanche current could be as high as the peak reverse recovery current.
Depending upon how good or bad the body diode is, and how fast the reverse
recovery event is forced (presumably by the speed at which the opposing
MOSFET in a half or full bridge turns on), the peak diode reverse current
may conceivably be higher than the load current.

This has some interesting implications. This means peak MOSFET drain-source
avalanche current during reverse recovery could be very high, and is quite
unpredictable given the inadequate reverse recovery information provided by
most MOSFET manufacturer's datasheets. Even the best datasheets leave me
wanting, it seems reverse recovery characteristics are notoriously
undercharacterized by both the MOSFET and diode industries.

If the MOSFET is sufficiently avalanche rugged, the MOSFET should survive
totally unharmed. On the other hand, most MOSFETs (even avalanche rated
MOSFETs) don't have unlimited peak avalanche capability. As International
Rectifier's application note AN 1005 suggests:

http://www.irf.com/technical-info/appnotes/an-1005.pdf

It would seem MOSFET destruction during avalanche can occur either due to
thermal failure, or too much peak current.

Avalanche ruggedness is a very nice feature in a MOSFET, even if your
intended application isn't supposed to cause normal avalanche conditions.
An RC snubber between drain and source can't necessarily always prevent
avalanche under these conditions since such a circuit has it's own parasitic
Lstray which would limit how fast the current can ramp up during snap off.
Additionally, there are practical limits as to how close an RC snubber could
be placed, some unclamped Lstray will still exist between MOSFET
drain-source since some Lstray is built right into the MOSFET package.

Note that when a discrete MOSFET fails it almost always fails (unless the
failure is so spectacular as to fuse or blow the package apart) with all
three terminals shorted together with relatively modest resistance. This
could lead some to erroneously attribute the MOSFET failure with gate oxide
failure. Note that the gate oxide is very thin and naturally must cover the
entire die in order to access all of the MOSFET cells. This means that if
even one tiny localized part of the die should fail (explode for instance),
the gate oxide will probably be locally damaged, thus producing the
gate-drain-source shorts without ever having to subject the gate-source
capacitance to excessively high voltage.




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