Re: LVDS driver in SERDES



Iterativeend wrote: 
TI and national uses start bit and stop bit.
If the data runs continuously, how can the clock be embedded in them.


That clock is supposed to be CW, the data is parallel in, what do you think you're going to do- drill a hole in the package to access an internal node? The data*** information is self-evident, how is it possible for anyone to become confused.

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