Re: Suggestions/Recommendations with CPLD's and Software

Although it's possible to do things in ISE with schematics, you would
probably be far better off using Verilog or VHDL.

i.e. specify the behaviour of the circuit rather than try to directly
emulate existing TTL.

Cheers

PeteS

.

Relevant Pages

  • Re: 2e enhanced ROM listing
    ... I've only done VHDL top level. ... actually IIRC both projects originally had top-level schematics, and I converted them to VHDL. ... One was Xilinx, the other Altera, and I did the conversion only so I could use native tools... ... Is that Verilog or VHDL? ...
    (comp.sys.apple2)
  • Re: New person to CPLD programming
    ... to see the flow. ... sometimes easier for me to put in VHDL. ... I think my choice would be to write in verilog, ... from schematics and then we know the schematics are readable. ...
    (comp.arch.fpga)
  • Re: About inputs ports sending values up
    ... Verilog started life as essentially 2 languages: ... VHDL took a very different view. ... Drivers necessarily have direction (which might ... connected to a bottom leaf level guy, also with an input port. ...
    (comp.lang.verilog)
  • Re: From vhdl to verilog
    ... by migrating to Verilog. ... The clocked process has no variables. ... translating RTL Verilog into VHDL is trivial ... there are things you can do in synthesisable VHDL ...
    (comp.lang.verilog)
  • Re: Choice of Language for FPGA programming
    ... (snip on verilog and VHDL) ... < making some ignorant mistakes. ... We in the world would anyone want to use a language with as many side ...
    (comp.arch.fpga)