SMPS switching loss question

Hi,

In a buck regulator with a rectifier diode if:
a. I use a driver of size 'X' to drive the control nmos (top nmos) of
area 'Y'
b. I use a driver of size 'X/2' to drive a control nmos (top nmos) of
area 'Y/5'

Will the switching losses (due to Vds Id overlap) be less in case 'b'
during turnon?
Will the switching losses (due to Vds Id overlap) be less in case 'b'
during turnoff?

I thought that the answer to both these questions should be yes, but in
simulaton I find that during turn on the 'overlap' time during turnon
is actually higher in case b as compared to case a. Is this expected in
a real world situation? Why is this so ?

Thanks
QQ

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