Re: 82C55A

In article <43A4D8BE.1040708@xxxxxxxxxx>,
Fred Bloggs <nospam@xxxxxxxxxx> wrote:

> You don't need a part that resets to zero. You tell us why that
> part has to reset to zero. The Intersil part is better.

The o/p polarity at POR is not the whole problem Fred.

The original NMOS 8255A (and 8255A-5) set all 24 i/o to
inputs at POR. That's the safe thing for an i/o device
to do and (afair) there were no internal pullup/downs,
so you could use external resistors to choose the safe
POR state for any i/o lines that were going to be outputs.
........... or so you thought initially

Because the 8255A had a design feature, which was quite
an ambush. From my 1979 data book.. "All of the output
registers, including the status flipflops will be reset
whenever the Mode is changed."

So you could only use pulldowns to set the POR polarity,
and had to adjust the following hardware to suit a logic
0 default polarity.

Then along came the CMOS versions, each with their own
design features.

The OKI 82C55A-2 is more or less a compatible replacement
for the NMOS 8255. However the OKI 82C55A-5, on a Mode
change, still sets all outputs on Ports A and C to zero,
but now leaves Port B outputs undefined.

The Intersil 82C55A introduced a new wrinkle. They added
a feature called 'bus hold', which is internal pullup/downs.

At POR all i/o is set to inputs, but now with a 400uA pullup.

However the silly B's still kept the feature that any
Mode change then slapped all outputs to a logic 0.

To get the same POR and Mode change polarities with the
Intersil 82C55A all outputs should have pulldowns, value
not greater than about 2k.

--
Tony Williams.
.

Relevant Pages

  • Re: 82C55A
    ... >>> You don't need a part that resets to zero. ... >>> part has to reset to zero. ... >> The o/p polarity at POR is not the whole problem Fred. ... >> Mode change then slapped all outputs to a logic 0. ...
    (sci.electronics.design)
  • Re: 82C55A
    ... >> You don't need a part that resets to zero. ... >> part has to reset to zero. ... > The o/p polarity at POR is not the whole problem Fred. ... > Mode change then slapped all outputs to a logic 0. ...
    (sci.electronics.design)
  • Re: 82C55A
    ... > I've samples some Intersil IS/CS82C55A parts but they reset with> ports to 1. ... Has anyone substituted for the OKI part> successfully w/out a re-design? ... You don't need a part that resets to zero. ... The Intersil part is better. ...
    (sci.electronics.design)
  • Re: Initializing a Flip-Flop on Power-up
    ... It's pathetic what young engineers consider a POR these days. ... Got enough honey-do projects so I am not going to fix their design. ... If there is a regulator I take it off before that and after, then issue the reset before it is too close to dropout. ... But a hysteresis is a good thing though I have to confess that I sometimes forego it, but only if there is enough margin between threshold and the circuit actually conking out. ...
    (sci.electronics.design)
  • Re: MPC5200 coming out of reset - does it actually work?
    ... not make it out of reset, the highest 3 address lines may be non-0 ... I made the POR longer; ... The PCI clock comes up at 33 MHz regardless of whether the CPU will ... as well as the suggested pulldowns on ...
    (comp.sys.powerpc.tech)