Re: Low noise IF3601/02 don't meet specs

"Fred Bartoli"
<fred._canxxxel_this_bartoli@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> schrieb im
Newsbeitrag news:43b59f8e$0$21714$626a54ce@xxxxxxxxxxxxxxx
>
> "Winfield Hill" <Winfield_member@xxxxxxxxxxx> a écrit dans le message de
> news:dp3v290roh@xxxxxxxxxxxxxxxxxx
> > Fred Bartoli wrote...
> > > Joe G (Home) wrote,
> > >> Fred Bartoli wrote,
> > >>>
> > >>> they are spec'd at 300pV/rtHz @ 5mA and 100Hz and should get
> > >>> down near 260pV @ 100kHz.
> > >>>
> > >>> Well for the IF3601 and both side of the IF3602 dual, I get
> > >>> 400pV/rtHz @ 5mA, and the noise PSD is almost flat.
> > >>
> > >> In the old days - silicon manufacturers used to publish the
> > >> test setups to acheive the data *** spec's. ...
> > >>
> > >> You can't say the FET doesn't meet spec's until you reproduce
> > >> the mfg'ers test setup...
> > >
> > > Of course I can. I duplicate the working conditions of the
> > > data*** (5mA/3V) in a test setup that's designed to add not
> > > more than 2% to the measured noise. Not a big deal really.
> >
> > Spell it out for us please. At the 100pV noise level it's easy
> > to mistakenly let the gain-setting components add to the measured
> > noise. You're claiming under 50pV of test-setup generated noise?
> > That requires 0.16-ohm resistors, or more likely none at all, like
> > my HP transistor noise meter, which runs the JFET flat out with a
> > grounded source, and separately measures its gain, to determine
> > the divisor required to obtain the narrowband input noise. Tell
> > us more about your measurement technique.
> >


Hello Fred,

Have you done a reference measurement before you
inserted the JFET? How much noise have you measured
in this pre-measurement?
I just want be sure that you haven't overlooked something.

Is your 1k resistor ok regarding extra noise?
I have read that thickfilm resistors have more noise than
you would expect from the basic noise formula.
This extra noise may depend from the voltage across
the resistor and the current flowing through it.
Who knows more about this?

Best regards,
Helmut


> >
>
> Yup, that's easy. Grounded source and gate, like this:
>
> |
> .-.
> | |470
> | |
> '-'
> | || 2200u
> +---||--.
> | || |
> .-. ===
> | |1K GND
> | |
> '-'
> 2.2n |
> |
> || +------> to low noise preamp
> AC source >----||-----. |
> for gain || | |
> meas. | |-+
> ___ | |
> bias >--|___|----+----->|-+
> 100meg | |
> | |
> --- |
> 2.2u --- |
> | |
> === ===
> GND GND
>
>
> Thanks to the large gm, the gain is about 100 and the 1K noise contributes
> less than 1% for 300pV input noise.
> This allow enough margin for the 2.2uF esr.
>
> Anyway it seems that Helmut has a point.
> I first measured noise with a setup more close to the expected design but
> got too much noise, so I folded back to this more simple setup, where I
> incorrectly attributed the lower than expected gain to the jfet Ro.
> I've just reinserted it into the cascoded setup and it measures at 88mS @
> 5mA and 130mS @ 10mA, closer to the measured results but I still miss
190pV
> somewhere if I stick to the 300pV given at 100Hz, not speaking of its
> announced specs at 50 or 100kHz where I get my figures.
>
> And this lower gm than expected isn't good news for me (more fets, more
> parasitics) since I counted on running them at 20mA. Now I have to run
them
> at 20mA just to meet the specs :-(
> We'll see with Interfet next week... year.
>
>
> --
> Thanks,
> Fred.
>
>


.

Quantcast