Re: OT: EPP problems

budgie wrote:
On Sun, 05 Feb 2006 04:05:30 GMT, Robert Baer <robertbaer@xxxxxxxxxxxxx> wrote:


budgie wrote:


I'm a bit lostbas to what this code is trying to do. Do you have a loopback
connection on the port?

Please read what i said:
<QUOTE>
Granted, nothing is connected to any of the pins, but still, during "input" time, one should see the equivalent of an LSTTL (or LTTL) input, and not a heavy pullup (2.4K).
It would seem that the original designers of this scheme did not know how to do a true or complete tri-state of the output stage - and all other designers slavishly followed like sheep.
<\quote>


I did read it, and it led me to one conclusion.

Either you're right and eveyone else is wrong, or ......


Also, why are you trying to read back from base address (&H378)+4?


Didn't catch your answer to that.



Why dont you forget turnaround and time delays. Just try the simple test: set
the post to high-Z and then read and display the bit values, and then
progressively pull them up/down with a low value resistor while watching the
displayed bit values.

I guess you did not read my post.
I *said* that i tried to make lines an input, AND i said that there ain't no such thing as "high-Z"; 2.4K internal pullup to +5V is *NOT* "high-Z"!


I DID tell you what I believed you should try, and report back. You didn't do
that.



If that doesn't work, you don't have a bidi-capable port.

All of the documentation, and the BIOS says EPP, *and* (like i said but you did not read), i tried other boards, including an ISA parallel board that supports SPP, EPP and ECP.


Please tell us all why you are trying to read back from base address (&H378)+4.


Let us know the result.

And in answer to your question, yes I do conduct serious I/O through the LPT1:
port on this and other PC's without interrupts, and all in QuickBasic.


Well, then would you be so kind as to post the software, and the hardware interface?


This particular piece of hardware is a custom EPROM programmer for a particular
client. An NDA prevents posting schematics or the substance of the code. As a
result, much of the code has been omitted but enough remains to hopefully convey
what is being done.

The "interface" comprises:
----------- SNIPped for brevity ---------
Thanks for the program; i find that use of the subroutines make for greater readability.
There is very little time penalty for a call to and return from a subroutine.
Will look it over the next few days.

As far as why i am reading that port?
Well, if one looks at the EPP documentation (which it seems you missed), that is the EPP data R/W port and one is supposed to read incoming data there.
On the old SPP cards, one can readback data that has been sent to the printer (ie: written to the data output latch and thus the pins).
That capability has been retained, but instead of actually sensing the pin levels like IBM did in their printer port cards, the newer cards seem to wimp out and read the register.
That same failure to conform to the IBM "standard" happened in a number of the 286, 386 and 486 printer cards.
So...the only way to actually read pin logic levels seems to be via the EPP data I/O port.
*****
A low level TTL input pullup is 40K and a low level schottky input pullup is 20K.
That is the standard as defined by Texas Instruments.
I had nothing to do with that and have no control over that.
The pins of all EPP ports that i have looked at have three states: output low, output high, and "neither"; the third state acts like a 2.4K pullup to +5V with a 2.2K or a 1K pulldown. Certainly *not* like an input to any TTL device!
I also have nothing to do with that nor do i have any control over that unless i damage them by over current in either direction.
Theoretically, a 420 ohm resistor to ground would get about 0.8V for a low and IFFI (if and only if) the "input" logic threshold abides by TTL standards, then that becomes marginally acceptable.
A 200 ohm pulldown would be far better, but that could possibly result in a few watts of dissipation in the ASIC if all pins were high.
Granted, one can use a decent TTL tristate driver with 200 ohm protection resistors in series, and enable output *only* when the EPP pins are supposed to be an input; that would make the life of the ASIC better.
.

Relevant Pages

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