Re: OT: EPP problems
- From: Robert Baer <robertbaer@xxxxxxxxxxxxx>
- Date: Tue, 07 Feb 2006 08:53:01 GMT
cs_posting@xxxxxxxxxxx wrote:
Robert Baer wrote:One major problem is that there is absolutely no disclosure concerning the ASCI parallel port electrical specs.
Seems my computer motherboard is OK; other boards, including an ISA
board that supports SPP/EPP/ECP all have the same problem.
No matter how one does the programming of the registers, during the
time when a pin "wants" to be an input (or more accurately, does not act
like an output), the equivalent resistance on that pin is about 2.4K
(tested with 2.2K and 1.0K load to ground).
Maybe it's not a bug but a feature.
The parallel port is not necessarily an ordinary chip-to-chip logic
interface. If you look at what it does, it's a driver (/receiver) for
a transmission line. At high speeds, you may want a much smaller line
termination impedance than you would for a short chip-to-chip
connection (and even there you might design in some termination on the
PCB).
In the real high speed communications ports the impedances would be
written into the spec.
.
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