Re: kablooey

On 9 Mar 2006 07:49:47 -0800, "Tim Shoppa" <shoppa@xxxxxxxxxxxxxxxxx>
wrote:

John Larkin wrote:
One of my better customers just called. Seems six of my VME arbitrary
waveform generators failed, in the same VME crate, simultaneously.
We're talking over $30K of damage here.

I had them put a scope on the +5 supply and switch power on. It ramped
up in maybe 100 ms, peaked at 5.6 for a few ms, then settled down to
5.1. That's above the 5.5 abs max for my CPU and FPGA chips, but not
really that bad.

So I asked them to switch power off for various times, then back on. A
2 second delay gave 7.5 volts peak. An estimated 0.5 sec delay, as
fast as they could work the switch, ramped up to 8.8. I'm guessing an
optimum brownout might well hit 10 volts.

Dumb switching power supply design... stupid loop dynamics and no
crowbar!

Crowbars for linear 5V supplies are typically set at 6.2V, but the spec
on the crowbar would allow it to not trip until 6.6V. For better or
worse, on switching supplies the specs are usually even looser.

VME crates are from the days of LS TTL, and those chips would generally
take 7V on Vcc and still be within official max limits, and they
usually wouldn't expire based on just getting a little spike of 10V.

If you get the boards back and determine what did blow, I'd be very
interested in the details. Are they failing self-test, or have the bus
interfaces blown, or is everything toast?

Tim.

We got one back yesterday. Two chips are running hot, the MC68332 CPU
(directly on +5) and a big Xilinx SpartanXL FPGA. The FPGA is powered
from +3.3, linear-regulated from the +5 supply, but it connects to the
CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. So it
looks like the +5 blew the CPU and it, in turn, pulled up a bunch of
the FPGAs i/o pins and fried it too.

What's cool is that the CPU is running very hot but is still executing
the firmware! And the FPGA is hot and really dead.

We're going to replace both chips (418 pins total!) and see how things
look. There are 5 more FPGAs on the board, but we're optimistic
they're OK.

Here's a pic of the board.

http://www.highlandtechnology.com/DSS/V375DS.html

John



.

Relevant Pages

  • Re: kablooey
    ... waveform generators failed, in the same VME crate, simultaneously. ... Two chips are running hot, ... and a big Xilinx SpartanXL FPGA. ... CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. ...
    (sci.electronics.design)
  • Re: kablooey
    ... Two chips are running hot, ... and a big Xilinx SpartanXL FPGA. ... CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. ... He's harassing the crate vendor now. ...
    (sci.electronics.design)
  • Re: kablooey
    ... John Larkin wrote: ... Two chips are running hot, ... and a big Xilinx SpartanXL FPGA. ... CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. ...
    (sci.electronics.design)
  • Re: C64 Building Block Computer (was: IEEE 488 bus)
    ... Configuring this profile can be done from whatever system is ... super-PLA, FPGA, whatever, that routes all the lines. ... with real processor/video/audio chips. ... File it under - Communication to PC bus - topic. ...
    (comp.sys.cbm)
  • C64 Building Block Computer (was: IEEE 488 bus)
    ... Configuring this profile can be done from whatever system is ... with real processor/video/audio chips. ... All boards would have an FPGA and a loader flash. ... As a bonus, the FPGA designs, if they could be made modular, could then be synthesized into small 40 pin .6" boards to plug into a real 64. ...
    (comp.sys.cbm)