Re: kablooey

John Larkin wrote:
On 9 Mar 2006 07:49:47 -0800, "Tim Shoppa" <shoppa@xxxxxxxxxxxxxxxxx>
wrote:


John Larkin wrote:

One of my better customers just called. Seems six of my VME arbitrary
waveform generators failed, in the same VME crate, simultaneously.
We're talking over $30K of damage here.


<snip>



We got one back yesterday. Two chips are running hot, the MC68332 CPU
(directly on +5) and a big Xilinx SpartanXL FPGA. The FPGA is powered
from +3.3, linear-regulated from the +5 supply, but it connects to the
CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. So it
looks like the +5 blew the CPU and it, in turn, pulled up a bunch of
the FPGAs i/o pins and fried it too.

What's cool is that the CPU is running very hot but is still executing
the firmware! And the FPGA is hot and really dead.

We're going to replace both chips (418 pins total!) and see how things
look. There are 5 more FPGAs on the board, but we're optimistic
they're OK.

Here's a pic of the board.

http://www.highlandtechnology.com/DSS/V375DS.html

John




$30,000 repair
-----
/ Rock \
| _ |
\/ - -

_o/
| J. Larkin
/ |

**==========**
**Hard Place** piss off the customer
**==========**

My questions: what are you going to do on the repaired
board to prevent a repeat? Can you offer to market
that engineering change at x$ per for the other boards
that haven't yet been blown? What happens with the
5 other boards that are blown?

There must be a way to turn this into a public relations
coup ...

Ed
.

Relevant Pages

  • Re: kablooey
    ... waveform generators failed, in the same VME crate, simultaneously. ... Two chips are running hot, ... and a big Xilinx SpartanXL FPGA. ... CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. ...
    (sci.electronics.design)
  • Re: kablooey
    ... That's above the 5.5 abs max for my CPU and FPGA chips, ... So I asked them to switch power off for various times, ... VME crates are from the days of LS TTL, and those chips would generally ... the MC68332 CPU ...
    (sci.electronics.design)
  • Re: kablooey
    ... Two chips are running hot, ... and a big Xilinx SpartanXL FPGA. ... CPU bus, and it's supposed to be 5-volt tolerant on its I/Os. ... He's harassing the crate vendor now. ...
    (sci.electronics.design)
  • Re: C64 Building Block Computer (was: IEEE 488 bus)
    ... Configuring this profile can be done from whatever system is ... super-PLA, FPGA, whatever, that routes all the lines. ... with real processor/video/audio chips. ... File it under - Communication to PC bus - topic. ...
    (comp.sys.cbm)
  • C64 Building Block Computer (was: IEEE 488 bus)
    ... Configuring this profile can be done from whatever system is ... with real processor/video/audio chips. ... All boards would have an FPGA and a loader flash. ... As a bonus, the FPGA designs, if they could be made modular, could then be synthesized into small 40 pin .6" boards to plug into a real 64. ...
    (comp.sys.cbm)