Re: Win, where do they all come from ? (e-)


"Winfield Hill" <Winfield_member@xxxxxxxxxxx> a écrit dans le message de
news:e0gi93017ag@xxxxxxxxxxxxxxxxxx
Winfield Hill wrote...

Fred Bartoli wrote...
Winfield Hill wrote...
Fred Bartoli wrote...

I've received the LT1043 and also the latest AD low Q parts (ADG121x)
which AD recommended after some interesting exchange. I must say I
tried them, but without much hope. And indeed... they work amazingly
well. Absolutely nothing common with the ADG44x.

Which part did you try, exactly?

ADG1211.

When AD asked me to try these parts I asked them what could make
these 121x different from the 44x but it seems they didn't want to
answer. Now I know they work, I'll ask them again and report here
if I have some interesting answer.

They must be finally doing the right thing with the old substrate
trick, a proper break before make, I assume.

I doubt that's enough. They have to fight to give 0.5pC charge on
one output. 0.15fC is 300 times better. If the substrate was
switched to one of the switch side, this would translate to probably
unattainable matching. My guess is for something like substrate
switched, but to a buffering push-pull follower or the like.

Sorry, I didn't see the fC vs pC units. That's amazing. Would
you be kind enough to measure the charge-injection vs common-mode
switched voltage? As is often the case, the AD datasheet shows a
strong switched-voltage dependency, rising to >0.2pC at 1.0V, >1pC
at 5V with +/-5V supplies, and 3pC at 10V with +/-15V supplies.

Just to clarify my question, the datasheet charge-injection plots
commonly show a curve of changing charge-injection, going through
zero at some point. The ADG1211's plots are in the low pC region,
not the sub fC region. I'm wondering if you have found a special
voltage, and what the charge-injection vs voltage plot is for the
ADG1211 measured your way, with neither side of the switch tied to
a low-Z input signal. You'll have to change the voltage on the
capacitor or change both power-supply voltages together to do this
test. Surely the result will be important for your application,
besides being of interest to me and the others here?



I didn't had much time to do this yesterday.
To fully clarify things, there are 2 injected charges quanta, when
switching. One on each switch side.
More, the charges at opening and at closing are not necessarily equal,
leaving a net charge on the node(s) after a complete on-off or off-on cycle.
With the datasheet measurements conditions, we just see one side charge, the
other side being shunted to ground by the source side generator and we just
see the charge left at the switch opening transition. The net injected
charge is unknown, as is the turn ON switching charge since it is dumped to
groung through the switch channels.

As you've understood both charges are important to me, but not for the same
reasons.

The hold charge (lets call it like this) is the one measured under the
datasheet conditions (one side shorted to ground, the other side hooked to a
1nF cap). The voltage offset on the cap after the hold event measures the
hold charge.
The AD parts, ADG1211 as well as the ADG44x, make a nice job on this hold
charge in the 500fC-1pC range depending on the part#.
This charge is too high for my purpose, but it can easily be trimmed by
adjusting one supply voltage, which is nothing else than setting the common
mode voltage bias point where the charge perfectly cancels on the curves of
the datasheet, as you have noted.
In my test report ( www.fbartoli.com/pub/sed/ADG444_test_summary.pdf ) the
trimming sensitivity is about 1mV/fC of charge correction, which translates
to about +14V/-15V supply voltages for the ADG444.

This hold charge is not a problem for me since it is trimmable and I have
trimmed it down to the fC level (1uV step). This fC level is not the one I
reported above as happy news.


Then comes the net injected charge (sum of both sides), which should sums
over an ON/OFF cycle as exactly zero for a perfectly isolated switch (only
capacitive coupling charge injection).
That's where the ADG1211 makes a huge difference over the ADG444 (about 2E6
times better!).

I've done a complete set of measurements (both charges and DC leakage vs
common mode).
The set up was:

Fully ON or 1kHz
| .---> SCOPE
| AD8066 |
V |
_/ |\ |
------o/ o-------+----+-------|+\ | ___
| | | | >-+---|___|--+---> DVM
| | | .-|-/ | |
--- .-. --- | |/ | |
--- 47n 100M | | --- 1n | | ---
| | | | '------' ---
| '-' | |
| | | |
=== === === ===
GND GND GND GND

ADG1211_VS+ <---.
|
/+\
15V(adj)( ) VCM (-10 to +10)
\-/ _
| / \
+------(+ -)--.
| \_/ |
/+\ ===
15V(adj)( ) GND
\-/
|
ADG1211_VS- <---'


The switch was either driven at 1kHz 50%dc, or either fully on for the DC
leakages measurement.
The ADG1211 supplies were first adjusted so that the hold step at 0V VCM was
nulled.
The opamp offset and leakage current were corrected.

In the following results the hold step charge is calculated as the hold step
voltage x 1nF.
The net injected charge is the (average switching leakage current - DC
leakage current)/1kHz
= (V(DVM_1kHz)-V(DVM_ON))/100M/1kHz


VCM Hold Step Q I leak(DC) Net Q
-10 -3.02pC -0.05pA -0.88fC
-7 -2.5pC -0.14pA -0.62fC
-5 -1.97pC -0.06pA -0.30fC
-3 -1.2pC -0.01pA -0.20fC
-2 -0.81pC +0.01pA -0.19fC
-1 -0.41pC +0.04pA -0.16fC
0 0 +0.05pA -0.13fC
1 0.42pC +0.05pA -0.10fC
2 0.78pC +0.06pA -0.07fC
3 1.18pC +0.06pA -0.05fC
5 2.0pC +0.11pA +0.02fC
7 2.73pC +0.15pA +0.12fC
10 3.75pC +0.25pA +0.58fC



This part is really amazing.


--
Thanks,
Fred.


.

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