Re: SMPS, control loop?

Joerg wrote:
Hello Tim,


Well, say you have a load on the output, the system is in equilibrium, and you suddenly decrease the load. If the controller responds slowly (as it must in voltage mode), then the duty cycle will remain constant, pumping more charge into the filter inductor, also ramping up transformer current as well. Eventually, the filter capacitor will respond, but only after roughly an LC time constant, perhaps a milisecond or so (say, 50 cycles of the PWM frequency), at which time the inductor will theoretically have a metric shitload of amps through it! This energy then flows into the capacitor, so voltage keeps rising, a lot, and the controller chokes off the PWM until capacitor voltage falls to a reasonable level, at which point the voltage continues to drop, because it then takes more time to recharge the inductor.


Thou shalt not provide too small of a load side capacitor. So don't play uncle Scrooge with that cap ;-)


If the controller is current-mode, duty cycle can be controlled directly by current and somehow secondarily by voltage, but voltage will still overshoot as the inductor's excess energy plops into the capacitor.


In some constellations (small cap, >50% duty) this can result in stability issues. You can read up on that under the topic "right half plane zero" or "RHP".


But neither the KA7500 or SG3524 (both used in AT supplies) are naturally current mode. I don't see obvious evidence of a current shunt and amplifier to convert output current to error voltage, though I haven't thoroughly traced the schematic.


Current mode control prevents the inductor current to reach "kablouie" levels. I usually employ current mode in my (often discrete) designs.

Regards, Joerg

As usual, Joerg is spot on. Jerald Foults' website (spelling?) has a whole bunch more useful stuff. (P)CMC is the way to go. If only the UC384x was developed before the poxy SG3524 or TL494....

NB: real men dont use smps chips ;)

As long as the peak energy stored in the output cap(s) is >> that in the choke, the overshoot is small. If electrolytic caps are used and ESR is minimised, capacitance tends to be very high (multiple large cans are often required for low ESR, resulting in huge capacitance), maximising capacitive energy storage. Likewise if inductor size is minimised (eg 10-20% ripple) then so is inductor energy. Overall, overshoot is minimised.

Conversely, a high inductance, low capacitance design has the potential for significant overshoot, which must be dealt with somehow. and lots of inductance means lots of weight, cost and volume.

PC supplies are cheap, so inductive components are kept as small as possible, helping reduce the severity of this problem. The output inductors are coupled, so the high-voltage capacitance has a proportionately larger effect than the low-voltage capacitance.

That being said, I have not measured the step recovery performance of a cheap PC supply. I have measured some cheap OEM supplies, and found responses ranging from OK to unacceptable.

IMO if the smps cant run continuously into a dead short, its not good enough. A brutal test is to attach a pair of metal rods to an output, and intermittently short them with a large, coarse file. If the smps can handle that without evil overshoot (the filter inductor current ramps up to the current limit value, even with (P)CMC) and/or explosions, then its a good design.

thats actually pretty easy with a single output PCMC smps, but multiple-output supplies PCMC tend to have problems, as whichever output is shorted tends to get all the power...

Cheers
Terry
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