Re: My SMPS 'shell' circuit

On Sun, 21 May 2006 22:17:05 -0500, "Tim Williams"
<tmoranwms@xxxxxxxxxxx> wrote:

"legg" <legg@xxxxxxxxxxxxxxx> wrote in message
news:a63272ti8lsqkkp5u62rvhfnsljtd0bjoa@xxxxxxxxxx
Incidentially, where does the DC offset come from, anyway?

Depending upon layout, under normal operation, the 494 can be pretty
good for matching duty - but you are buffering the 494 through bipolar
transistors with no consideration for overdrive and storage.

Well, it seems you missed the roasty drive they get- those 47 ohm resistors
turn off the 440x's pretty nicely, even with the gob of current pushed in.
(Risetime is pretty impressive too, I've never seen a 4401 switch in 30ns
before. ;-)

Drive current limit is from the 180R series resistors and the 494
emitter voltage compliance of 2V5, producing 10mA. When forced through
47R resistors, this does not even guarantee turn-on, never mind
controlling base current to avoid saturation or desaturation in the on
interval,when they do.. There is no off voltage to sweep base charge
out of a saturated switch,

Considering the 494 output is pretty symmetrical (I haven't measured it, but
I imagine they are within 10ns), the only imbalance I can be adding is due
to switch time, which because I'm adding it to high and low side pulses,
would be differences in the 440x's themselves, at most 100ns I would guess
(I haven't measured switching time variation personally ...see below).

Further,
your drive waveform itself is DC-coupled into the drive transformer.

Well, yes, in a manner of speaking. But at some point, magnetizing current
always comes to zero. At low duty cycles, the snubber keeps flyback down
until it decays; at higher duty, the current is stored by the snubber and
reversed in the opposing pulse.

The only correction mechanism is drive txf saturation

Sure, if voltage or pulse width became unbalanced, it could happen, but
pulse width is always symmetrical (within jitter and differences in
switching time) because of the 494's flip-flop, and voltage is always
symmetrical (within Vsat differences) because it's applied the same way, in
reverse, to form the other half. The time integral can't really be nonzero
unless something really shitty happens, like a transistor smokes or
something, in which case you have a problem anyway.

Your 'very well matched' drive has
produced time period imbalances of 13%. Admittedly, narrow duty
exagerates the effect of simple switching delays.

Yes, 13% is quite good I would say, considering you're using the media-esque
exaggeration of trends as ratio when difference is needed.

(why should it stop at 22A?) the balance is eventually found much faster!
^^^
Because the MOSFETs won't pull much more than that, actually. I don't
remember from testing but the transformer probably won't pull much more than
that either, although I test inductors at 15V, not 150V, so that's something
of a moot point.

Mosfets are voltage control devices, and there is no control over this
voltage. Your mosfet current is limited by RDSon/HVDC for a first orer
approximation of power-transformer-saturated mosfet current limit.

For a full-load low-line droop in your coupling capacitors of 10%,
Your 30KHz switcher

Muh? Re-read that- I said 60kHz. In fact I left the oscillator running and
the scope is still warm. Lesse, I count 17us between rising edges, that's
58.8kHz at the MOSFETs. Not bad I'd say since I calculated the frequency
from the data*** RC tables.

Your schematic labels the oscillator frequency as 60KHz. True, the
components placed there produce a fequency that is off of the 494's
application chart, where the ~120KHz achieved is less than half the
predicted RC formula for the oscillator within it's design range. The
oscillator frequency is double the full-wave configuration output.

Some 'A' or 'B' vesions of the 494, and some mfr's more recent
'normal' product can be more predictable at higher frequencies, but
these do not use the 494's simple output driver stage.

As long as I'm measurin' stuff, it looks like I can get this thing down to
about 100ns pulses (with MOSFETs attached, no power applied). At this
level, they're only 4V tall, hardly enough to make a MOSFET conduct. The
low side pulse is about 100ns wide and the high side (viewing from the same
connection, not necessarily fair) is about 120ns. These pulses have a
considerable tail (about as long), but you can't expect much from a 4V
twitch, anyway.

At this hair thin level, the MOSFETs would probably be unequally driven
(according to their gate thresholds) and also in the linear range (for most
loads), limiting current and making saturation a non-issue. Dissipation is
also nil since the duty is so low.

I suppose if this were allowed to idle at nearly zero load current then a
large load were demanded, a good bit of current could be pulled to correct
the voltage imbalance. A good solution would be a load resistor. <g>

For that matter, at realistic duty cycles, rise time is 100ns, voltage
remains at +/-10V for however long (0.1-7.6 us by the looks of it), drops
about as quickly to about 5V and enters a rather ugly slope to 0V for about
a microsecond at the longest (the falling slew rate gets better at higher
duty, indicating snubber current pushes it to zero faster; transistor output
capacitance perhaps?).

Tail aside, it's my opinion that the driver circuit is working quite well!

Anyways.

you'd need to increase their capacitance to 4u7
each. This was a common value used in low frequency 400-600W
converters in the 80s.

Sounds about right.

Check out the ESR in 200V electrolytics to fugure out why it might not
be such a good idea trying to get them to pass 2.5A (5AppK) each.

Yep, that's why I have eight capacitors on there.

Wait, sorry but didn't the film caps carry switching current?

Before you ask, be advised that all of these parts act in parallel to
pass primary current, if the main bulk rail is a properly bypassed AC
short.

Well, it should be with 840uF (and (+100/-50%) / sqrt(6) = +40/-20%
tolerance) on there.

You also haven't seen how I put the better and more numerous caps *right at*
the MOSFETs. Hum, I need to grab the USB cable and download some photos.
Maybe see if I can get that coat hanger load glowing again for a Vulgar
Display of Power (to make a Pantera reference).

I don't see this discussion going anywhere fast to improve the
performance of the circuit in question, or to advance the stage of
your breadboard tests, without some kind of disapointment intervening.
Perhaps when you've attempted to close the loop or have popped a few
more mosfets, I can be of further (if any) assistance.

RL
.

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