Re: 47uf decoupling caps?!
- From: "Tom Bruhns" <k7itm@xxxxxxx>
- Date: 9 Oct 2006 13:18:50 -0700
rickman wrote:
miso@xxxxxxxxx wrote:
rickman wrote:
He has data that shows that the rule of thumb of 0.1 uF cap per power
pin is way far over kill. In fact, the real high speed decoupling is
done by the power planes alone. The high speed noise can not be
smoothed by the caps simply because of their intrinsic inductance.
Further when they couple with the power plane capacitance, they really
do create a parallel resonance which *increases* the impedance at
certain frequencies.
His approach is to use closely spaced power and ground planes to create
a low impedance path at high frequencies. Then use a few 0.1 caps, a
few more 0.01 caps and a few more 0.001 caps. Of course the smaller
the package the better, but it is important to use parts that do not
have *too low* a value of ESR. The ESR will not affect the performance
of the caps, but it will minimize the peak of the parallel resonances
between all the different parts.
Er, I think the above paragraph needs further elaboration. ;-) I have
seen some sorry LDOs have problems with too low ESR, but geez, bypass
of a digital circuit having a problem with too low ESR?
If you remember your basic AC circuits the paragraph should be self
explanatory. The problem is the parallel resonance which creates an
impedance peak. This can destroy the low impedance of a power
distribution system near the resonance frequency. If you remember that
the shape of a resonance is determined by the resistance in the circuit
which acts to damp resonance, you will realize that you need some
minimum level of ESR in the cap to lower the resonance peak. I have
not found any resources on the web to point you to which demonstrate
this, but the course I took with Lee Ritchey showed this in theory,
simulation and in real measurements.
It is important to remember that the ESR of a capacitor has little to
do with its decoupling ability. It sets the floor at self resonance,
but the remainder of the impedance-frequency plot is determined by the
capacitance and parasitic inductance.
Parallel resonance in power distribution systems is very real.
Further to this: a decent introduction to these concepts and bypassing
in general may be found in the PDF "white paper" at
http://www.avx.com/docs/techinfo/mlcbypas.pdf. I've seen similar
things from other capacitor manufacturers and from manufacturers of ICs
that depend on good bypassing (such as Xilinx).
It's not just theory. As rickman wrote, it's supported by practical
designs and measurements on those designs.
Cheers,
Tom
.
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