Re: PID question



hondgm@xxxxxxxxx wrote:
John Popelish wrote:
hondgm@xxxxxxxxx wrote:

In general, I think a current control loop has to react much
faster than a voltage control loop. One way to accomplish
this is to have two PID controls, a fast one that controls
current, and a slow one than controls voltage, by modifying
the setpoint for the current loop. This is called a cascade
controller (a single output controlled by two measured
variables, one slaved to the other. You implement current
limit by having a low selector at the current controller
setpoint. In other words, the actual current controller
setpoint is the lower of, the current limit value, or the
output of the voltage controller. Both the setpoint for the
voltage controller, and the current limit value can come
from your DAC.
(snip)
You would tune the current controller, first, with only the
limit setpoint in effect, then tune the voltage controller
supplying the setpoint for the current controller.

Keep in mind the DAC provides a reference for a regulator, so I'm not
digitally regulating voltage.

Understood. In PID controller terminology, the DAC produces a setpoint for the voltage regulator. The regulator acts as a follower to copy the reference as the voltage output (possibly with a scaling factor).

I'll be able to set the voltage via a
user interface (as well as current), but the PID controller will have
the capability of forcing the voltage lower to meet a current setpoint.

Read again what I said about the low selector.

Does your response still apply?

Yes.


I'm a bit confused about how to apply a cascade configuration to this. Also, I've been thinking about the maximum value the accumulating error can reach, the "I" part.
Digitally, the output voltage can be set 0 - 2500. Right now, the
accumulating error is limited in software from exceeding +/- 28 000;
kind of a random value I chose. Is there a methodology to setting this
limit? It seems to me now that +/- 28K is a little high and will cause
sluggish response after settling into a "maximum error" condition for
long enough to hit this max.

I'm not sure what you are talking about, here, but it sounds a lot like preventing integral wind up in the master control of a cascade control strategy (the voltage control, in this case) when it loses control of the slave (the current controller). In effect, you need some way to limit the error at the input of the error amplifier, once the output ceases to have an effect (the moment the current limit process takes over), so that voltage control resumes smoothly and quickly, once the current falls below the limit value. Limiting the integral windup causes the voltage controller output to match the current limit setpoint at the moment that the current falls below the current limit value.
.



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