Re: 12 and 16-bit oscilloscopes

"Joel Kolstad" <JKolstad71HatesSpam@xxxxxxxxx> writes:

"John Devereux" <jdREMOVE@xxxxxxxxxxxxxxxxxx> wrote in message
news:87d56hkrd9.fsf@xxxxxxxxxxxxxxxxxxxxxxxxxx
I would love to make a "scope" based on something like the
AD7660. It's a 24 bit 2.5MHz sigma delta ADC
- PC does post processing for "triggering", averaging, spectrum analysis

Probably a handy option, but having a PC sift through 2.5MSps just
looking for an edge to trigger on seems like a bit of a waste of the
CPU. With some programmable logic (CPLD/FPGA) in the same box as
the ADC, you could perform triggering there and then be able to use
much lower-end PCs.

Probably - I have not really looked at the numbers too seriously. But
desktop CPUs are *very* fast, and edge detection is pretty easy. It
would already be doing signal averaging and maybe digital filtering
(especially on the slower "timebases"). So simple level detection
would not be much extra work.

Of course we could do all this in a bigger FPGA, but then where do you
stop...

--

John Devereux
.

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