Re: Review this Goofy 555 Based SMPS Design

D from BC wrote:
On Mon, 22 Jan 2007 11:57:17 -0500, John Popelish <jpopelish@xxxxxxxx>
wrote:

D from BC wrote:

I picked CMOS 555..just because it had that cool parallel processing
look to it.
Also.... it's one of the most ancient IC's and a text book item. Using
it in the cct. has an artistic quality. :)
What advantage (apart from including a few resistors) do you get by using the C555s, instead of a dual comparator?

I had to pick one of the following methods:
* Schmitt inverter or schmitt gates
* Comparator with hysteresis control pin
* Positive feedback or feedback to a switch
* 2 comparators and a discrete SR latch * CMOS 555

I had to pick something... I've never used the 555 this way before and
I liked the newness factor.
Besides..prop delay, I draw, Vs specs fit the app ok.

I posted about hysteresis methods some time ago. IIRC somebody bashed
the positive feedback method in favor of the SR method.

I haven't done a study to compare the methods for an
economic/performance fitting in my app.
It was one of those "works....good enough...move on...." decisions.
Also..it's hobby electronics...I can do artsy stuff like that :)

To really answer your question...
I dunno...

Fair enough. Shouldn't you add a third C555 to control output voltage? Add a pulsed switch that adds enough load to take the current above and below the current limit on a regular basis, to see how well both voltage and current regulation work.

BTW, you don't need the resistors on the 555 outputs.
.

Relevant Pages

  • Re: Review this Goofy 555 Based SMPS Design
    ... Comparator with hysteresis control pin ... Besides..prop delay, I draw, Vs specs fit the app ok. ... the positive feedback method in favor of the SR method. ...
    (sci.electronics.design)
  • Re: Hysteresis Comparator Methods
    ... time-domain aspect of the positive feedback. ... This appnote is a great example of simplistic, ... Anybody familiar with the drawbacks of the 2 comparator D latch ... and because the comparator prop delays ...
    (sci.electronics.design)
  • Re: Hysteresis Comparator Methods
    ... time-domain aspect of the positive feedback. ... This appnote is a great example of simplistic, ... Anybody familiar with the drawbacks of the 2 comparator D latch ... and because the comparator prop delays ...
    (sci.electronics.design)
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