Re: Divide a clock frequency by N using combinatorial logic
- From: John Larkin <jjlarkin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Tue, 20 Feb 2007 18:14:07 -0800
On Wed, 21 Feb 2007 01:38:38 GMT, "John Barrett" <ke5crp1@xxxxxxxxxxx>
wrote:
"John Larkin" <jjlarkin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:dg5nt2dvij8rcs13heeh7c5tgqtl59sb14@xxxxxxxxxx
On Tue, 20 Feb 2007 16:59:55 -0700, Don Lancaster <don@xxxxxxxxxx>
wrote:
bluemoon123 wrote:
Hi,
Does anyone know how a clock can be divided by N, using purely
combinatorial logic?
Thanks.
Yes.
Yup, I think so, just nand gates or something. But it will have to
have internal states, so some people might shout "flipflop!"
John
Another solution -- without flip flops this time !!
Clocked RS latches modified for edge triggering on the clock can be
cascaded -- would take N latches and you can pick off your output anyplace
along the chain to get any desired duty cycle. A clocked RS latch expands to
5 gates, and you'll probably need 2 or 3 more to make it edge triggered,
which gets you riight up there with the flip flop for gate count per stage,
but with the disadvantage of not using a counter approach which means many
more stages for larger N.
I think you can also just "walk" states through rs flops (or
equivalent feedback gadgets) on clock high and low levels, which is
not exactly edge triggering
The question then becomes "just exactly HOW PURE" must the combinatorial
logic be. If you cant build latches or flipflops from gates, I dont think
its possible.
Just for grins -- here is a weird way to do it that just uses low level
gates + some analog components
http://www.wenzel.com/pdffiles/dividers.pdf
The LC on the dflop thing is cute!
John
.
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