Re: I/O signal conditioning question
- From: Jamie <jamie_ka1lpa_not_valid_after_ka1lpa_@xxxxxxxxxxx>
- Date: Thu, 05 Apr 2007 19:25:43 -0400
John S. Gaglione wrote:
Greetings Group:how about a Tristate buffer ?
I am working on the interface between an LCD display and
a PIC 16F877A.
The display multiplexes its "BUSY" signal on the same pin as
the 8th data bit.
My problem is that the PIC input pin cannot see the 2.4v BUSY signal.
I have tried buffering the signal through 2 gates on a 74LS04. The PIC now can see this fine, but when the LCD switches the pin
over to read data it floats and the '04 gates turn on. This causes the LCD to read the 8th bit "On" all the time, interfering with the character data. I tried several resistors to force the gate input down, but the PIC's data doesn't get through reliably.
I found that this will work if I connect the signal directly
between the PIC and the LCD, and also connect it to the base
of a PNP transistor with a PCB mount speaker (piezo?),
connected between the Collector and +5, and Emitter to GND.
I don't want to keep the speaker in the circuit, because it seems
to draw a lot of current, and I don't understand why it works.
Any other suggestions for increasing the voltage of my BUSY
signal, without drowning out the signal from the PIC direction?
Thanks
John
--
"I'm never wrong, once i thought i was, but was mistaken"
Real Programmers Do things like this.
http://webpages.charter.net/jamie_5
.
- References:
- I/O signal conditioning question
- From: John S . Gaglione
- I/O signal conditioning question
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