Re: Grounding

On Apr 13, 7:06 pm, "AJ" <itwasm...@xxxxxxxxxxx> wrote:
"John Popelish" <jpopel...@xxxxxxxx> wrote in message

news:TJKdnSSLMM8ow4HbnZ2dnUVZ_qOpnZ2d@xxxxxxxxxxxxxxx





AJ wrote:

Now I am a bit confused as to what I should do with the top ground plane.
If I pour copper over the top without regard, I will end up with some
multi point grounding, where the ground pads are connected to the bottom
plane at more than one point. Would it be wise to not use a top ground
plane at all to prevent this and carefully control the ground currents to
minimize noise?

If it was my board, I wouldn't put ant grounds on top unless I had a
particular reason for doing so. I would stitch short jumpers across any
slots in the bottom side plane caused by bottom side traces, to improve
the continuity of the plane. I would use pairs of grounded traces (or
surrounds) to shield particularly sensitive signals, or to contain the
noise or control impedance for particularly powerful or fast signals.
Otherwise ground pour islands are just antennas.

Thanks for the input guys, I have tried to implement your idea's.

Best regards,

Adrian Hamilton- Hide quoted text -

- Show quoted text -

Going to 4 or more layers is often a superior approach, and it may not
be as costly as you suppose. However, if you're stuck with 2 layers:
Provided that you can adequately 'stitch' the layers together with
vias, incomplete copper pours on different layers can improve
grounding. However, this may require more vias than are economical,
since board cost is partly determined by the number of holes. The key
layout rules to observe:
1) Do not allow high speed signal lines to cross 'slots and moats',
since their associated return currents will be forced to go around the
slot or moat, creating a loop that represents an impedance
discontinuity, parastic inductance, and EMI radiator.
2) Take particular care to stitch any 'flags', which are elongated
copper pour regions. Any dv/dt on flags will radiate, i.e., EMI
currents will flow through parasitic capacitance to the flag region.
3) Pitch of stitching vias should be on the order of 1% of a
wavelength of the highest harmonic frequency originating in the
circuit or present in the ambient. For the mixed 100MHz DSP and 20-bit
codec boards I've designed, this usually meant vias every 5 mm or so.
Note that this is a density of 4 vias per sq cm, which is as many as
400 extra vias on a 10cm x 10cm board.
Paul Mathews

.

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