The Education of MassiveProng (Pt 3 of 275) (001/634) (484/634)

address space for registers 712 to configure PCI agents. The
configuration registers 712 are accessed via an Index/Data register
pair.

For PCI bus 104 to main memory accesses, the MPU 102 is a target on
the PCI bus 104. For host to peripheral component accesses, the MPU is
a master on the PCI bus 104. The host can read and write both
configuration and non-configuration address spaces. When the host is
accessing the MPU configuration registers 712, the MPU 102 is both the
master and the target. Configuration cycles initiated by MPPU 102
.