Re: Op-amp design: Bipolar or Cmos

On Jun 4, 4:17 pm, Chris Jones <lugnut...@xxxxxxxxxxxxxxxx> wrote:
linnix wrote:
We are in the process of building some op-amp ICs.
I found a reference design and layout of a bipolar op amp.
However, the author says that cmos op-amps are more popular
in the real world. Questions:

#1 Anybody got a cmos op-amp design and layout to sell or license?

#2 Anybody able to port from bipolar to cmos?

This will not give you an optimal design. If you use mosfets like you would
want to use bipolars, you will find that they make lousy bipolars. If you
accept that they are mosfets, and design your opamp from scratch as a CMOS
opamp, that will work much better.

#3 What are the drawbacks to stay with bipolar, other than powers?

If you have more than a few hundred logic gates in the other part of your
chip, and you want low power consumption or a small die, CMOS

I know it's a strange requirement, but size is not an issue.
Basically, the analog circuits (op-amp, charge pump, etc) will be
added to an area of 2000 to 3000 microns rectangle. The area would
otherwise be wasted anyway. There are no other active circuit in this
wafer, which will be combined with another wafer before dicing.

or BiCMOS
probably is better than bipolar. (BiCMOS = bipolar + CMOS, best of both
worlds and most expensive process too)

High mask count is out of the question. We would rather pick one with
least mask set.

If you have tens of thousands of
logic gates on your die then you definitely want either CMOS or BiCMOS.
You could still use a bipolar opamp if you use a BiCMOS process.

The op-amp circuit will be enable on demand, so power usages
may not be too critical for stand-by. What about active power usages
between bipolar and cmos?

What are your specs? Otherwise how long is a piece of string?

We don't know exactly until the final device is tested.


How about linearity? Would bipolar be better than cmos?

You can do well in either technology with sufficient effort.

Unless the opamp is the principal function of your chip (which would make it
a very strange business proposition),

The opamp would be the first to be integrated. Other parts will just
follow with the same process, hopefully.

the rest of the chip will probably
determine the technology that you need to use. First of all, what is the
rest of the chip? How many gates of digital (if any), are you designing it
yourself or buying IP blocks, what is the max supply voltage you need,

18V

what kind of frequencies

10KHz

does the chip need to handle and how does it need to
handle them, and what production volume do you anticipate?

100,000+

How much can you afford to spend on masks?

Less than 10 additional masks.


Also you will need to list the specs of your amplifier - offset voltage,
bias current, do you need the inputs to work near both supply rails or only
near one supply rail (rail to rail inputs can be a nuisance and should be
avoided if you want the best linearity performance without getting into
patent difficulties),

No, we can charge pump the supply high enough to avoid rail to rail
requirements.

do you need the output to go near both rails or only
one, how many milliamps output current do you need, etc. etc.

Just enough to be A2D by an uC.

Without
answering these questions and many more, it will be a case of garbage in ->
garbage out.

To throw a further spanner in the works, you may well find that an opamp is
not the optimal kind of amplifier to do what you need to do. For example,
it is difficult to buy stand-alone OTAs, but if you are designing your own
chip then you are free from these restrictions and you might find that
there are things that will achieve your goals better than an op-amp would.

We know the structure of the design, but not the exact parameters at
this point. However, we can redo a couple of masks in the final
iteration. For example, adjusting the resistive values with the metal
layer.


Chris


.

Relevant Pages

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