Re: Stepper motor driver with less noise?
- From: John Popelish <jpopelish@xxxxxxxx>
- Date: Wed, 11 Jul 2007 20:37:55 -0400
john jardine wrote:
I can't remember the details, right now, but I had lots of
trouble producing a stable, quiet operation from a two phase
Allegro driver chip, once I increased the clock frequency
high enough that the fundamental should have been inaudible.
The problem centers around the low di/dt over the short
current control cycle, so the regulation rattles all over
the place and sub harmonic operation ensues. I solved the
problem by impressing a small triangle wave on the current
sense reference that had slope opposite to the motor current
wave, so that, even though the motor current varied little
each cycle, there were clear current limit signal crossings
each cycle, keeping the current control stable. In effect,
the impressed triangle wave lowered the gain of the current
limit control loop. This eliminated all the sub harmonic
jumping around and the motor went completely silent when
holding position. If anyone is interested, I'll dig up the
details.
Interesting. I'm having trouble visualising it. A pic' would be worth a
thousand words!.
A few more words, first:
At the beginning of each clock cycle, the the reference voltage is compared to the amplified current measurement, and if the current is less than the reference, the output switch is turned on, till the current exceeds the reference, at which time the switch is turned off. If the clock is run at a low frequency, relative to the di/dt for the motor and supply voltage, this results in a single voltage pulse per clock cycle, if there is enough voltage to pass through the setpoint current cleanly in half the cycle or less, with a nice big current sawtooth passing the reference twice per cycle. But with a high frequency clock (an ultrasonic frequency) the motor current changes almost none at all during a clock cycle, so you get multiple clock cycles of on time (with one truncated cycle at the end that is just noise), followed by multiple clock cycles of off time, as the current falls below the reference.
By adding a small clock cycle triangle to the reference voltage, so that the reference peaks high, just as the cycle starts, and falls through most of the cycle, a short and variable power pulse is produced, less than a clock period, that maintains the slowly changing motor current somewhere through the middle of that reference triangle wave. In effect, the gain is lowered from infinite (bang. bang control) to a lower proportional gain (inverse to the amplitude of the impressed triangle wave) that stabilizes the control loop, even though the motor current time constant is many clock cycles.
.
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