Re: ESR Meter - design contest

On Sat, 14 Jul 2007 10:07:11 -0700, the renowned John Larkin
<jjlarkin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:

On Sat, 14 Jul 2007 07:53:56 -0700, Winfield <winfieldhill@xxxxxxxxx>
wrote:

Fred Bloggs wrote:
John Larkin wrote:
Fred Bloggs wrote:
John Larkin wrote:
Fred Bloggs wrote:
John Larkin wrote:

That's about right, but it's still going to be simpler than
most of the goofy and truly terrible "esr" meters we've seen
here lately. You may as well measure leakage and dielectric
absorption while you're at it; code is cheap.

Granted they are amateurish junk, but your designs and ideas
are so *ugly* they are borderline grotesque. When you have
something artful to suggest that will be the day....

You don't approve of my products? Show us some of yours.

As they say, I don't have to be a chef to know the food stinks...

Show us something you've designed.

You show us an esr meter that doesn't require a VMX crate.

I suggest we have an esr-meter design contest. However, to
make it usenet friendly, and accessible to the readers, all
entries must be made in ASCII drawings, annotated with text.

Why not make it a group project, for real? I'd be willing to do the
first cut at schematic and algorithms. What we really need is someone
to hack the real code; I hate to program, and I'm going to do it most
of the weekend likely [1], so I'm not going to volunteer for that
part!

I'll volunteer, on provision that you, and anyone else contemplating a
serious contribution, read a few things so as to understand the
problem domain (testing, and in particular in-circuit testing of
e-caps) better.

I'm sure Fred would make valuable design contributions.

But no ASCII art! We can just post sketches to abse.

John

[1] statistical analysis of some FPGA configuration patterns, leading
up to a fast, small compression/decompression algorithm. We need to
fit an application program and 8 megabits of Xilinx config stuff into
a 4 mbit Eprom.


Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@xxxxxxxxxxxx Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
.

Relevant Pages

  • Re: ESR Meter - design contest
    ... most of the goofy and truly terrible "esr" meters we've seen ... You show us an esr meter that doesn't require a VMX crate. ... statistical analysis of some FPGA configuration patterns, ... up to a fast, small compression/decompression algorithm. ...
    (sci.electronics.design)
  • Re: ESR Meter - design contest
    ... most of the goofy and truly terrible "esr" meters we've seen ... You show us an esr meter that doesn't require a VMX crate. ... I'll volunteer, on provision that you, and anyone else contemplating a ...
    (sci.electronics.design)
  • Re: ESR Meter - Roll your own - ESRrev0.JPG
    ... the goofy and truly terrible "esr" meters we've seen here lately. ... but your designs and ideas are so *ugly* they are borderline grotesque. ... You show us an esr meter that doesn't require a VMX crate. ... Check out the specs compared to the SRS or Signal Recovery or ...
    (sci.electronics.design)
  • Re: ESR Meter - design contest
    ... most of the goofy and truly terrible "esr" meters we've seen ... You may as well measure leakage and dielectric ... absorption while you're at it; ... You show us an esr meter that doesn't require a VMX crate. ...
    (sci.electronics.design)
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