Re: 32kHz crystal issues


Ok, I did some experimenting.

First off, I realized something important - the chip has an internal
2.5v regulator for it's core logic, so the DC offset isn't as suspect
as it could have been.

I swapped the GPIO next to the OSCI return with a different GPIO that
doesn't change once the system's running, and that got rid of the
interference. There doesn't seem to be interference from the next pin
over, which is the high speed OSCI, and which is also a GPIO with lots
of edges.

I replaced the 330k resistor with a 560k resistor. It didn't change
any of the DC offsets, but it did reduce the drive Vpp some (and
increased the startup time from 1s to 3s ;)

With either resistor, the drive phase and return phase are not 180
degrees out of phase. More like 120, as if the filter wasn't pushing
it around enough. However, the return peak corresponds to the first
part of where the drive signal hits gnd; maybe an even bigger
resistor? Nope, even 1M doesn't change the phase. I guess I'll have
to tune it once it's on the final PCB and the stray capacitance is
finalized, yes?

Meanwhile, I'm going to write some software to internally compare the
32k clock to the FRC clock so I can see what effect the scope probes
have.

DJ
.

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