Re: Regarding glitches,,,



On 27 Jul, 08:22, chocka <chocka.pe...@xxxxxxxxx> wrote:
Dear all,

I need a clarification regarding the glitches in data lines.
I am testing a FPGA prototype board by probing out the data line in
the debug pin of the board and i found that there are many glitches
occured in the data lines on viewing in logic analyser. The data line
is declared as "inout" in our glue logic.
I gave the data line to the 33ohm series termination resistor and
viewing the resistor output in the logic analyser. still the glitch is
coming. I also tried with 22 ohm series termination resistor.Still the
glitch is there...

Any ideas or suggestion please to remove the glitches......

Thanks in advance,

As the other poster says, use a scope instead. When you first turn it
on, turn the gain up to max ~ 1mV per div and then touch the input
with your finger. The display is showing a 60Hz (or 50Hz) waveform.
This is "glitching" And it is *not* even RF!

The higher the frequency the worse it will get and you are using
square waves!

You probably dislike the idea but if you could read up a little on
"ground plane" and "transmission line" and maybe "antenna" you would
have a distinct advantage to other digital-only chaps. And immediately
you will anticipate, avoid and/or minimise the problems you are
seeing.

It's better to avoid radiating energy than to try an absorb it in
termination but if you must then read up on "snubber" too.

Robin

.



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