Re: Parallel caps in schematics
- From: John Larkin <jjlarkin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Thu, 02 Aug 2007 08:39:33 -0700
On Thu, 2 Aug 2007 09:00:19 -0500, "Jon Slaughter"
<Jon_Slaughter@xxxxxxxxxxx> wrote:
How come in some schematics I see many parallel caps? Why don't they combine
them into one?
For example, in a TI ADC EVM(ADS5444) schematic it has 3 parts that say
"Bypass caps for DRVX" where X goes from 1 to 3 and all are identical. Each
one uses 3 different types of caps all in parallel.
1x10uF 10V (polar)
3x0.1uF 16V
3x470pF 50V
I assume that this is simply to get the required capacitance in terms of
standard values?
If my calculations are correct then the 6 parallel non-polar caps should
have an equivilent capacitance of about 0.3uF.
Now this brings up an issue. The 3 pF caps do not really add much
capacitance so what are they for? They are rated at 50V but surely at 10V
the first cap will go(theoretically) making the others useless? (although
maybe they exist for transient reasons?)
Any ideas?
Thanks,
Jon
Capacitors have series inductance, so for good high frequency
bypassing it helps to put them in parallel. Also the multiple caps can
be put in different places, bypassing multiple power pins and such.
There's less justification for using different values; none in my
opinion. One big cap, the 10 uF guy, might be helpful if the supply
current has serious low-frequency components, unlikely here. The other
caps should be physically small and electrically large.
If I were laying out a board for this chip, I'd use a good ground
plane and a split power plane with Avdd inside the chip footprint and
Dvdd outside, with a bunch of 0.33 uF 0603 caps bypassing each power
pour. Or separate power planes, above and below ground, if you can
spare the layers.
John
.
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